History log of /external/llvm/include/llvm/Support/ELF.h
Revision Date Author Comments (<<< Hide modified files) (Show modified files >>>)
cd81d94322a39503e4a3e87b6ee03d4fcb3465fb 21-Jul-2014 Stephen Hines <srhines@google.com> Update LLVM for rebase to r212749.

Includes a cherry-pick of:
r212948 - fixes a small issue with atomic calls

Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
dce4a407a24b04eebc6a376f8e62b41aaa7b071f 29-May-2014 Stephen Hines <srhines@google.com> Update LLVM for 3.5 rebase (r209712).

Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
36b56886974eae4f9c5ebc96befd3e7bfe5de338 24-Apr-2014 Stephen Hines <srhines@google.com> Update to LLVM 3.5a.

Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
4411ba06fc5777edf4dde239d6ac8289bfd488ce 06-Nov-2013 Simon Atanasyan <simon@atanasyan.com> Add DT_VERSYM dynamic table entry tag definition.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194149 91177308-0d34-0410-b5e6-96231b3b80d8
5c042162beb3c2dd556e00aab84c4278a69cd5b1 04-Nov-2013 Zoran Jovanovic <zoran.jovanovic@imgtec.com> Support for microMIPS branch instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193992 91177308-0d34-0410-b5e6-96231b3b80d8
f132bf39b95815ed899c78f0ff33d743a286b1ac 30-Oct-2013 Simon Atanasyan <simon@atanasyan.com> [Mips] Add more SHF_MIPS_xxx ELF section flags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193713 91177308-0d34-0410-b5e6-96231b3b80d8
1aaf43c2a2ec0fd4c8dbfe56558237219c5f8af7 29-Oct-2013 Zoran Jovanovic <zoran.jovanovic@imgtec.com> Support for microMIPS jump instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193623 91177308-0d34-0410-b5e6-96231b3b80d8
5e4d8a5eca03c977ba01e061078a2d740ee6130a 24-Oct-2013 Zonr Chang <zonr.xchg@gmail.com> Include missing Compiler.h for using LLVM_ENUM_INT_TYPE.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193315 91177308-0d34-0410-b5e6-96231b3b80d8
0082717cb537e2d1424f755a49510fa9f9e67071 23-Oct-2013 Zoran Jovanovic <zoran.jovanovic@imgtec.com> Support for microMIPS relocations 1.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193247 91177308-0d34-0410-b5e6-96231b3b80d8
26ba5df2ebc123b1d214a5e7334c650e90d3738a 06-Oct-2013 Simon Atanasyan <simon@atanasyan.com> [Mips] Add MIPS program header types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192059 91177308-0d34-0410-b5e6-96231b3b80d8
118a0659ab8a4d0e0af343b88e5fa71a5c1eb6a6 24-Sep-2013 Reid Kleckner <reid@kleckner.net> Explicitly request unsigned enum types when desired

The underlying type of all plain enums in MSVC is 'int', even if the
enumerator contains large 32-bit unsigned values or values greater than
UINT_MAX. The only way to get a large or unsigned enum type is to
request it explicitly with the C++11 strong enum types feature.

However, since LLVM isn't C++11 yet, I had to add a conditional
LLVM_ENUM_INT_TYPE to Compiler.h to control its usage.

The motivating true positive for this change is compiling PointerIntPair
with MSVC for win64. The PointerIntMask value is supposed to be pointer
sized value of all ones with some low zeros. Instead, it's truncated to
32-bits! We are only saved later because it is sign extended back in
the AND with int64_t, and we happen to want all ones.

This silences lots of -Wmicrosoft warnings during a clang self-host
targeting Windows.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191241 91177308-0d34-0410-b5e6-96231b3b80d8
766f25306af343fb2784350cb4d8cd9ca180f0d3 15-Sep-2013 Benjamin Kramer <benny.kra@googlemail.com> ELF: Add support for the exclude section bit for gas compat.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190769 91177308-0d34-0410-b5e6-96231b3b80d8
6fccaafd8be0eb7619b5a210387b0d1254ef4174 25-Jul-2013 Rafael Espindola <rafael.espindola@gmail.com> Remove the mblaze backend from llvm.

Approval in here http://lists.cs.uiuc.edu/pipermail/llvmdev/2013-July/064169.html

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187145 91177308-0d34-0410-b5e6-96231b3b80d8
3af1c9d3343357849f19f7467f9c16220ad37ca4 24-Jul-2013 Akira Hatanaka <ahatanaka@mips.com> [mips] Use pristine object file while processing relocations.

Similar to ARM change r182800, dynamic linker will read bits/addends from
the original object rather than from the object that might have been patched
previously. For the purpose of relocations for MCJIT stubs on MIPS, we
internally use otherwise unused MIPS relocations.

The change also enables MCJIT unit tests for MIPS (EL/BE), and the following
two tests now pass:

- MCJITTest.return_global and
- MCJITTest.multiple_functions.

These issues have been tracked as Bug 16250.

Patch by Petar Jovanovic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187019 91177308-0d34-0410-b5e6-96231b3b80d8
228e0afcfd0d5f167a95c6ddbec2c6a4a90b6d2b 02-Jul-2013 Ulrich Weigand <ulrich.weigand@de.ibm.com> [PowerPC] Add support for TLS data relocations

This adds support for TLS data relocations and modifiers:
.quad target@dtpmod
.quad target@tprel
.quad target@dtprel
Currently exploited by the asm parser only.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185394 91177308-0d34-0410-b5e6-96231b3b80d8
bbeba2c20023c8bf6b34585fadf2abcc77ba8f32 02-Jul-2013 Ulrich Weigand <ulrich.weigand@de.ibm.com> [PowerPC] Fix 32-bit PowerPC TLS relocs

Some TLS relocs were copied incorrectly from ppc64 to ppc32,
and some were missing completely.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185390 91177308-0d34-0410-b5e6-96231b3b80d8
5de735a962a255676cf3a9bc255579d465670633 25-Jun-2013 Ulrich Weigand <ulrich.weigand@de.ibm.com> [PowerPC] Support @got modifier

Add VK_... values and relocation types necessary to support
the @got family of modifiers. Used by the asm parser only.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184860 91177308-0d34-0410-b5e6-96231b3b80d8
84569698f01bcb49afe5b6140bf0d61cf4f3cf5a 21-Jun-2013 Ulrich Weigand <ulrich.weigand@de.ibm.com> [PowerPC] Support R_PPC_REL16 family of relocations

The GNU assembler supports (as extension to the ABI) use of PC-relative
relocations in half16 fields, which allows writing code like:

li 1, base-.

This patch adds support for those relocation types in the assembler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184552 91177308-0d34-0410-b5e6-96231b3b80d8
cab0a1933875935c717136d251e2af9749533ba8 21-Jun-2013 Ulrich Weigand <ulrich.weigand@de.ibm.com> [PowerPC] Support various tls-related modifiers

The current code base only supports the minimum set of tls-related
relocations and @modifiers that are necessary to support compiler-
generated code. This patch extends this to the full set defined
in the ABI (and supported by the GNU assembler) for the benefit
of the assembler parser.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184551 91177308-0d34-0410-b5e6-96231b3b80d8
f7c1ee79fe90353fcd3f545f9d45a01a837bbf4b 21-Jun-2013 Ulrich Weigand <ulrich.weigand@de.ibm.com> [PowerPC] Support @higher et.al. modifiers

This adds support for the @higher, @highera, @highest, and @highesta
modifers, including some missing relocation types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184550 91177308-0d34-0410-b5e6-96231b3b80d8
f8f87dcfceadd1b842d130303a7091ad7d7d67d0 21-Jun-2013 Ulrich Weigand <ulrich.weigand@de.ibm.com> [PowerPC] Support @toc@h modifier

This adds the relocation type and other necessary infrastructure
to use the @toc@h modifier in the assembler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184549 91177308-0d34-0410-b5e6-96231b3b80d8
d56d756611173394e4ec937601ab825280fc2577 05-Jun-2013 Sean Silva <silvas@purdue.edu> [ELF] Add ELFOSABI_GNU.

ELFOSABI_LINUX is a historical alias for ELFOSABI_GNU according to

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183339 91177308-0d34-0410-b5e6-96231b3b80d8
e4ee452576449d79db4e82b9e5dd08c732327e71 28-May-2013 Simon Atanasyan <simon@atanasyan.com> [Mips] Add Mips specific dynamic table entry tags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182803 91177308-0d34-0410-b5e6-96231b3b80d8
c37077af7bfdc22da2d267eee7905927dd5fdd17 08-May-2013 Ulrich Weigand <ulrich.weigand@de.ibm.com> [PowerPC] Add some missing PPC64 relocs

All R_PPC_... relocs should also be present (using the same number)
under the corresponding R_PPC64_... name. The latter were missing
for a couple of cases, which this patch adds.

This is not a big problem when emitting the reloc, because we can
just use the R_PPC_... define instead. But it is a problem when
*dumping* relocations e.g. using llvm-readobj, because this will
expect only R_PPC64_... values when inspecting a ppc64 ELF file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181451 91177308-0d34-0410-b5e6-96231b3b80d8
820b3fd7716cf5ab26961d1b2b21fd5d0f330fe1 03-May-2013 Richard Sandiford <rsandifo@linux.vnet.ibm.com> [SystemZ] Add ELF relocation support

Another step towards reinstating the SystemZ backend. Tests will be
included in the main backend patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181008 91177308-0d34-0410-b5e6-96231b3b80d8
a6cd815994a30888d579e7731a98e668f07a5965 12-Apr-2013 Nico Rieck <nico.rieck@gmail.com> Add missing relocation names

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179358 91177308-0d34-0410-b5e6-96231b3b80d8
65e90c036472380bba160c349412f37128608e1c 26-Mar-2013 Ulrich Weigand <ulrich.weigand@de.ibm.com> PowerPC: Simplify handling of fixups.

MCTargetDesc/PPCMCCodeEmitter.cpp current has code like:

if (isSVR4ABI() && is64BitMode())
Fixups.push_back(MCFixup::Create(0, MO.getExpr(),
Fixups.push_back(MCFixup::Create(0, MO.getExpr(),

This is a problem for the asm parser, since it requires knowledge of
the ABI / 64-bit mode to be set up. However, more fundamentally,
at this point we shouldn't make such distinctions anyway; in an assembler
file, it always ought to be possible to e.g. generate TOC relocations even
when the main ABI is one that doesn't use TOC.

Fortunately, this is actually completely unnecessary; that code was added
to decide whether to generate TOC relocations, but that information is in
fact already encoded in the VariantKind of the underlying symbol.

This commit therefore merges those fixup types into one, and then decides
which relocation to use based on the VariantKind.

No changes in generated code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178007 91177308-0d34-0410-b5e6-96231b3b80d8
4bf030402de033aa0f0eb10165a169b9042c65da 14-Mar-2013 Joerg Sonnenberger <joerg@bec.de> Add two of the float related ARM-specific entries for e_flags needed for
linkers to interact with GNU ld.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177016 91177308-0d34-0410-b5e6-96231b3b80d8
fc7695a653323071ec141aee994e4188592ad1f5 25-Feb-2013 Bill Schmidt <wschmidt@linux.vnet.ibm.com> Fix missing relocation for TLS addressing peephole optimization.

Report and fix due to Kai Nacke. Testcase update by me.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176029 91177308-0d34-0410-b5e6-96231b3b80d8
5cdeca8b1d726790fe9687bc4a4d615d299bc151 19-Feb-2013 Jack Carter <jcarter@mips.com> ELF symbol table field st_other support,
excluding visibility bits.

Mips (o32 abi) specific e_header setting.

EF_MIPS_ABI_O32 needs to be set in the
ELF header flags for o32 abi output.

Contributer: Reed Kotler

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175569 91177308-0d34-0410-b5e6-96231b3b80d8
c989c61798783f99abe7f8c27baf76bd2aea5067 19-Feb-2013 Jack Carter <jcarter@mips.com> ELF symbol table field st_other support,
excluding visibility bits.

Mips (Mips16) specific e_header setting.

EF_MIPS_ARCH_ASE_M16 needs to be set in the
ELF header flags for Mips16.

Contributer: Reed Kotler

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175566 91177308-0d34-0410-b5e6-96231b3b80d8
ccb3c9c2702f548fd0a7d60a622e6f4fdf0940e7 19-Feb-2013 Jack Carter <jcarter@mips.com> ELF symbol table field st_other support,
excluding visibility bits.

Mips (MicroMips) specific STO handling .

The st_other field settig for STO_MIPS_MICROMIPS

Contributer: Zoran Jovanovic

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175564 91177308-0d34-0410-b5e6-96231b3b80d8
6d3a278aabb0007e75a6c36c904538950e4b0093 16-Feb-2013 Michael J. Spencer <bigcheesegs@gmail.com> [ELF] Add STN_UNDEF.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175338 91177308-0d34-0410-b5e6-96231b3b80d8
dc08bfbd565ba6540be698bba551b2039661299d 12-Feb-2013 Jack Carter <jcarter@mips.com> This patch just fixes up various llvm formatting
violations such as tabs, blanks at eol and long

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175007 91177308-0d34-0410-b5e6-96231b3b80d8
7304702ef99f98897d15baae0eede55f294bc602 05-Feb-2013 Jack Carter <jcarter@mips.com> This patch that sets the Mips ELF header flag for
MicroMips architectures.

Contributer: Zoran Jovanovic

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174360 91177308-0d34-0410-b5e6-96231b3b80d8
72062f5744557e270a38192554c3126ea5f97434 31-Jan-2013 Tim Northover <Tim.Northover@arm.com> Add AArch64 as an experimental target.

This patch adds support for AArch64 (ARM's 64-bit architecture) to
LLVM in the "experimental" category. Currently, it won't be built
unless requested explicitly.

This initial commit should have support for:
+ Assembly of all scalar (i.e. non-NEON, non-Crypto) instructions
(except the late addition CRC instructions).
+ CodeGen features required for C++03 and C99.
+ Compilation for the "small" memory model: code+static data <
+ Absolute and position-independent code.
+ GNU-style (i.e. "__thread") TLS.
+ Debugging information.

The principal omission, currently, is performance tuning.

This patch excludes the NEON support also reviewed due to an outbreak of
batshit insanity in our legal department. That will be committed soon bringing
the changes to precisely what has been approved.

Further reviews would be gratefully received.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174054 91177308-0d34-0410-b5e6-96231b3b80d8
97130e2b3de080e231caac86dbce1500e4e7af16 30-Jan-2013 Jack Carter <jcarter@mips.com> This patch implements runtime ARM specific
setting of ELF header e_flags.

Contributer: Jack Carter

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173885 91177308-0d34-0410-b5e6-96231b3b80d8
e35badad221354a53bc07a523120ed82d93e0569 24-Jan-2013 Michael J. Spencer <bigcheesegs@gmail.com> [ELF] Add R_X86_64_IRELATIVE.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173316 91177308-0d34-0410-b5e6-96231b3b80d8
318b2cc86faeec1edd330eabba6cfcaab36e3fac 22-Jan-2013 Tim Northover <Tim.Northover@arm.com> Fix truncation of relocation types in Support/ELF.h

This is a follow-up to r171845, which fixes the same issue in the Support code.
Only targets with >256 relocations (principally AArch64) should be affected.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173151 91177308-0d34-0410-b5e6-96231b3b80d8
c91cbb9b0c90a480299cc7deaef166d47a61d9df 18-Jan-2013 Jack Carter <jcarter@mips.com> This is a resubmittal. For some reason it broke the bots yesterday
but I cannot reproduce the problem and have scrubed my sources and
even tested with llvm-lit -v --vg.
Support for Mips register information sections.

Mips ELF object files have a section that is dedicated
to register use info. Some of this information such as
the assumed Global Pointer value is used by the linker
in relocation resolution.

The register info file is .reginfo in o32 and .MIPS.options
in 64 and n32 abi files.

This patch contains the changes needed to create the sections,
but leaves the actual register accounting for a future patch.

Contributer: Jack Carter

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172847 91177308-0d34-0410-b5e6-96231b3b80d8
a1db5de9e70dd8ffda57b1a4373915ea866b6f1d 09-Jan-2013 Adhemerval Zanella <azanella@linux.vnet.ibm.com> PowerPC: EH adjustments

This patch adjust the r171506 to make all DWARF enconding pc-relative
for PPC64. It also adds the R_PPC64_REL32 relocation handling in MCJIT
(since the eh_frame will not generate PIC-relative relocation) and also
adds the emission of stubs created by the TTypeEncoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171979 91177308-0d34-0410-b5e6-96231b3b80d8
cde81689649ca62688e22a2d068ca893ce221332 09-Jan-2013 Shankar Easwaran <shankare@codeaurora.org> add hexagon flags in ELF.h

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171977 91177308-0d34-0410-b5e6-96231b3b80d8
7b449889e7886b263718b5103538970f287bc37e 04-Jan-2013 Adhemerval Zanella <azanella@linux.vnet.ibm.com> PowerPC: Fix eh_frame relocation for PIC

This patch fixes the PPC eh_frame definitions for the personality and
frame unwinding for PIC objects. It makes PIC build correctly creates
relative relocations in the '.rela.eh_frame' segments and thus avoiding
a text relocation that generates a DT_TEXTREL segments in link phase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171506 91177308-0d34-0410-b5e6-96231b3b80d8
b453e16855f347e300f1dc0cd0dfbdd65c27b0d2 14-Dec-2012 Bill Schmidt <wschmidt@linux.vnet.ibm.com> This patch improves the 64-bit PowerPC InitialExec TLS support by providing
for a wider range of GOT entries that can hold thread-relative offsets.
This matches the behavior of GCC, which was not documented in the PPC64 TLS
ABI. The ABI will be updated with the new code sequence.

Former sequence:

ld 9,x@got@tprel(2)
add 9,9,x@tls

New sequence:

addis 9,2,x@got@tprel@ha
ld 9,x@got@tprel@l(9)
add 9,9,x@tls

Note that a linker optimization exists to transform the new sequence into
the shorter sequence when appropriate, by replacing the addis with a nop
and modifying the base register and relocation type of the ld.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170209 91177308-0d34-0410-b5e6-96231b3b80d8
349c2787cf9e174c8aa955bf8e3b09a405b2aece 12-Dec-2012 Bill Schmidt <wschmidt@linux.vnet.ibm.com> This patch implements local-dynamic TLS model support for the 64-bit
PowerPC target. This is the last of the four models, so we now have
full TLS support.

This is mostly a straightforward extension of the general dynamic model.
I had to use an additional Chain operand to tie ADDIS_DTPREL_HA to the
register copy following ADDI_TLSLD_L; otherwise everything above the
ADDIS_DTPREL_HA appeared dead and was removed.

As before, there are new test cases to test the assembly generation, and
the relocations output during integrated assembly. The expected code
gen sequence can be read in test/CodeGen/PowerPC/tls-ld.ll.

There are a couple of things I think can be done more efficiently in the
overall TLS code, so there will likely be a clean-up patch forthcoming;
but for now I want to be sure the functionality is in place.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170003 91177308-0d34-0410-b5e6-96231b3b80d8
57ac1f458a754f30cf500410b438fb260f9b8fe5 11-Dec-2012 Bill Schmidt <wschmidt@linux.vnet.ibm.com> This patch implements the general dynamic TLS model for 64-bit PowerPC.

Given a thread-local symbol x with global-dynamic access, the generated
code to obtain x's address is:

Instruction Relocation Symbol
addis ra,r2,x@got@tlsgd@ha R_PPC64_GOT_TLSGD16_HA x
addi r3,ra,x@got@tlsgd@l R_PPC64_GOT_TLSGD16_L x
bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x
R_PPC64_REL24 __tls_get_addr
<use address in r3>

The implementation borrows from the medium code model work for introducing
special forms of ADDIS and ADDI into the DAG representation. This is made
slightly more complicated by having to introduce a call to the external
function __tls_get_addr. Using the full call machinery is overkill and,
more importantly, makes it difficult to add a special relocation. So I've
introduced another opcode GET_TLS_ADDR to represent the function call, and
surrounded it with register copies to set up the parameter and return value.

Most of the code is pretty straightforward. I ran into one peculiarity
when I introduced a new PPC opcode BL8_NOP_ELF_TLSGD, which is just like
BL8_NOP_ELF except that it takes another parameter to represent the symbol
("x" above) that requires a relocation on the call. Something in the
TblGen machinery causes BL8_NOP_ELF and BL8_NOP_ELF_TLSGD to be treated
identically during the emit phase, so this second operand was never
visited to generate relocations. This is the reason for the slightly
messy workaround in PPCMCCodeEmitter.cpp:getDirectBrEncoding().

Two new tests are included to demonstrate correct external assembly and
correct generation of relocations using the integrated assembler.

Comments welcome!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169910 91177308-0d34-0410-b5e6-96231b3b80d8
d7802bf0ddcac16ee910105922492aee86a53e1b 04-Dec-2012 Bill Schmidt <wschmidt@linux.vnet.ibm.com> This patch introduces initial-exec model support for thread-local storage
on 64-bit PowerPC ELF.

The patch includes code to handle external assembly and MC output with the
integrated assembler. It intentionally does not support the "old" JIT.

For the initial-exec TLS model, the ABI requires the following to calculate
the address of external thread-local variable x:

Code sequence Relocation Symbol
ld 9,x@got@tprel(2) R_PPC64_GOT_TPREL16_DS x
add 9,9,x@tls R_PPC64_TLS x

The register 9 is arbitrary here. The linker will replace x@got@tprel
with the offset relative to the thread pointer to the generated GOT
entry for symbol x. It will replace x@tls with the thread-pointer
register (13).

The two test cases verify correct assembly output and relocation output
as just described.

PowerPC-specific selection node variants are added for the two
instructions above: LD_GOT_TPREL and ADD_TLS. These are inserted
when an initial-exec global variable is encountered by
PPCTargetLowering::LowerGlobalTLSAddress(), and later lowered to
machine instructions LDgotTPREL and ADD8TLS. LDgotTPREL is a pseudo
that uses the same LDrs support added for medium code model's LDtocL,
with a different relocation type.

The rest of the processing is straightforward.

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34a9d4b3b9b7858b729a1af67afa721c048fe5e7 27-Nov-2012 Bill Schmidt <wschmidt@linux.vnet.ibm.com> This patch implements medium code model support for 64-bit PowerPC.

The default for 64-bit PowerPC is small code model, in which TOC entries
must be addressable using a 16-bit offset from the TOC pointer. Additionally,
only TOC entries are addressed via the TOC pointer.

With medium code model, TOC entries and data sections can all be addressed
via the TOC pointer using a 32-bit offset. Cooperation with the linker
allows 16-bit offsets to be used when these are sufficient, reducing the
number of extra instructions that need to be executed. Medium code model
also does not generate explicit TOC entries in ".section toc" for variables
that are wholly internal to the compilation unit.

Consider a load of an external 4-byte integer. With small code model, the
compiler generates:

ld 3, .LC1@toc(2)
lwz 4, 0(3)

.section .toc,"aw",@progbits
.tc ei[TC],ei

With medium model, it instead generates:

addis 3, 2, .LC1@toc@ha
ld 3, .LC1@toc@l(3)
lwz 4, 0(3)

.section .toc,"aw",@progbits
.tc ei[TC],ei

Here .LC1@toc@ha is a relocation requesting the upper 16 bits of the
32-bit offset of ei's TOC entry from the TOC base pointer. Similarly,
.LC1@toc@l is a relocation requesting the lower 16 bits. Note that if
the linker determines that ei's TOC entry is within a 16-bit offset of
the TOC base pointer, it will replace the "addis" with a "nop", and
replace the "ld" with the identical "ld" instruction from the small
code model example.

Consider next a load of a function-scope static integer. For small code
model, the compiler generates:

ld 3, .LC1@toc(2)
lwz 4, 0(3)

.section .toc,"aw",@progbits
.tc test_fn_static.si[TC],test_fn_static.si
.type test_fn_static.si,@object
.local test_fn_static.si
.comm test_fn_static.si,4,4

For medium code model, the compiler generates:

addis 3, 2, test_fn_static.si@toc@ha
addi 3, 3, test_fn_static.si@toc@l
lwz 4, 0(3)

.type test_fn_static.si,@object
.local test_fn_static.si
.comm test_fn_static.si,4,4

Again, the linker may replace the "addis" with a "nop", calculating only
a 16-bit offset when this is sufficient.

Note that it would be more efficient for the compiler to generate:

addis 3, 2, test_fn_static.si@toc@ha
lwz 4, test_fn_static.si@toc@l(3)

The current patch does not perform this optimization yet. This will be
addressed as a peephole optimization in a later patch.

For the moment, the default code model for 64-bit PowerPC will remain the
small code model. We plan to eventually change the default to medium code
model, which matches current upstream GCC behavior. Note that the different
code models are ABI-compatible, so code compiled with different models will
be linked and execute correctly.

I've tested the regression suite and the application/benchmark test suite in
two ways: Once with the patch as submitted here, and once with additional
logic to force medium code model as the default. The tests all compile
cleanly, with one exception. The mandel-2 application test fails due to an
unrelated ABI compatibility with passing complex numbers. It just so happens
that small code model was incredibly lucky, in that temporary values in
floating-point registers held the expected values needed by the external
library routine that was called incorrectly. My current thought is to correct
the ABI problems with _Complex before making medium code model the default,
to avoid introducing this "regression."

Here are a few comments on how the patch works, since the selection code
can be difficult to follow:

The existing logic for small code model defines three pseudo-instructions:
LDtoc for most uses, LDtocJTI for jump table addresses, and LDtocCPT for
constant pool addresses. These are expanded by SelectCodeCommon(). The
pseudo-instruction approach doesn't work for medium code model, because
we need to generate two instructions when we match the same pattern.
Instead, new logic in PPCDAGToDAGISel::Select() intercepts the TOC_ENTRY
node for medium code model, and generates an ADDIStocHA followed by either
a LDtocL or an ADDItocL. These new node types correspond naturally to
the sequences described above.

The addis/ld sequence is generated for the following cases:
* Jump table addresses
* Function addresses
* External global variables
* Tentative definitions of global variables (common linkage)

The addis/addi sequence is generated for the following cases:
* Constant pool entries
* File-scope static global variables
* Function-scope static variables

Expanding to the two-instruction sequences at select time exposes the
instructions to subsequent optimization, particularly scheduling.

The rest of the processing occurs at assembly time, in
PPCAsmPrinter::EmitInstruction. Each of the instructions is converted to
a "real" PowerPC instruction. When a TOC entry needs to be created, this
is done here in the same manner as for the existing LDtoc, LDtocJTI, and
LDtocCPT pseudo-instructions (I factored out a new routine to handle this).

I had originally thought that if a TOC entry was needed for LDtocL or
ADDItocL, it would already have been generated for the previous ADDIStocHA.
However, at higher optimization levels, the ADDIStocHA may appear in a
different block, which may be assembled textually following the block
containing the LDtocL or ADDItocL. So it is necessary to include the
possibility of creating a new TOC entry for those two instructions.

Note that for LDtocL, we generate a new form of LD called LDrs. This
allows specifying the @toc@l relocation for the offset field of the LD
instruction (i.e., the offset is replaced by a SymbolLo relocation).
When the peephole optimization described above is added, we will need
to do similar things for all immediate-form load and store operations.

The seven "mcm-n.ll" test cases are kept separate because otherwise the
intermingling of various TOC entries and so forth makes the tests fragile
and hard to understand.

The above assumes use of an external assembler. For use of the
integrated assembler, new relocations are added and used by
PPCELFObjectWriter. Testing is done with "mcm-obj.ll", which tests for
proper generation of the various relocations for the same sequences
tested with the external assembler.

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ba6086818d9c5070061f74ac9944666b4312c6f0 13-Nov-2012 Ulrich Weigand <ulrich.weigand@de.ibm.com> Add (some) PowerPC TLS relocation types to ELF.h and
generate them from PPCELFObjectWriter::getRelocTypeInner
as appropriate.

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296815dccee4f5392855c829b8a9e4a661b83a42 31-Oct-2012 James Molloy <james.molloy@arm.com> Add support for ARM segment types PT_ARM_ARCHEXT, PT_ARM_EXIDX and PT_ARM_UNWIND.

Patch by Pete Chou!

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8ceffeb95cca477d1faf176e95140272a28cb91c 30-Oct-2012 Sid Manning <sidneym@codeaurora.org> * Add e_flags enum for Hexagon
* Add Hexagon specific section indexes for small data
- Reviewed by Michael Spencer

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10a431824831c1d57a62dd84346387238f516e0c 18-Sep-2012 Roman Divacky <rdivacky@freebsd.org> Add PowerPC64 relocation definitions. Patch by Adhemerval Zanella!

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05b2bc8781d9af403a257599613e12cb8fef19e8 16-Aug-2012 Roman Divacky <rdivacky@freebsd.org> Revert r162034, r162035 and r162037.

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dd4b9f3fe9980dd0d7741c4e9ec817b330c134fe 16-Aug-2012 Roman Divacky <rdivacky@freebsd.org> Add PPC64 relocations definitions, by Adhemerval Zanella.

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6aef977e85d5ff2ae1f8b78a62db0762e82595a5 18-Jul-2012 Simon Atanasyan <satanasyan@mips.com> Add some missed ELF constants definitions:
- section types
- dynamic table entries tags
- state flags for DT_FLAGS_1 entry

The patch reviewed by Rafael Espindola.

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50b4c52633b0c933aabcd0741d1dae751ba339dd 23-Jun-2012 Marshall Clow <mclow@qualcomm.com> Add relocation types for Hexagon processor; patch by Sidney Manning <sidneym@codeaurora.org>

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68ef0382e4efe4a4c06e47a53a275b873ba0cff4 17-May-2012 Evandro Menezes <emenezes@codeaurora.org> [Hexagon] Clean up Hexagon ELF definition.

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a551a48402385cf3f4b754dc72264b2f0974b1a6 02-Apr-2012 Akira Hatanaka <ahatanaka@mips.com> Initial 64 bit direct object support.

This patch allows llvm to recognize that a 64 bit object file is being produced
and that the subsequently generated ELF header has the correct information.

The test case checks for both big and little endian flavors.

Patch by Jack Carter.

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2d70e263c2b508bf4641273dd89a23149f6f6164 09-Mar-2012 David Meyer <pdox@google.com> Support reading GNU symbol versions in ELFObjectFile

* Add enums and structures for GNU version information.
* Implement extraction of that information on a per-symbol basis (ELFObjectFile::getSymbolVersion).
* Implement a generic interface, GetELFSymbolVersion(), for getting the symbol version from the ObjectFile (hides the templating).
* Have llvm-readobj print out the version, when available.
* Add a test for the new feature: readobj-elf-versioning.test

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a0c17a495b12debcb7f206993bbc6020e2e6e8df 12-Dec-2011 Roman Divacky <rdivacky@freebsd.org> Add support for gnu_indirect_function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146377 91177308-0d34-0410-b5e6-96231b3b80d8
e3d3572e282733bd7aa5ac14115ed0804174e426 07-Dec-2011 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Add a few moreLocal/Global R_MIPS_GOT related fixups and
make the addend fixup code a bit more generic

Patch by Jack Carter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145998 91177308-0d34-0410-b5e6-96231b3b80d8
84bfc2f090639f933df06cc675c4385511516bef 23-Nov-2011 Akira Hatanaka <ahatanaka@mips.com> This patch addresses gp relative fixups/relocations for jump tables.

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88c1103c223c1e3eb430ce7081b347e1a2346967 14-Oct-2011 Akira Hatanaka <ahatanaka@mips.com> Add ELF relocation types for Mips.

Patch by Jack Carter and Reed Kotler at Mips.

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c8f6c44af46554036084cba21a118266f5e26c0e 13-Oct-2011 Michael J. Spencer <bigcheesegs@gmail.com> Fix incorrect ELF typedefs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141871 91177308-0d34-0410-b5e6-96231b3b80d8
fc61a23506fdad8f38e3437d741a4108339abcfe 13-Oct-2011 Michael J. Spencer <bigcheesegs@gmail.com> Add missing ELF constants.

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2c0d69fad0e658117922f3d96d9b732bedf9fd47 02-Aug-2011 Roman Divacky <rdivacky@freebsd.org> Sketch out PowerPC ELF writer. This is enough to get clang -integrated-as
to compile a working hello world on FreeBSD/PPC32.

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cbda61a468b4a2b33a54781d65023da7d9c8d291 13-Jun-2011 Michael J. Spencer <bigcheesegs@gmail.com> Fix spelling and sort CMakeLists.txt.

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2d7a53aec2c6426eba9e5dd6462cc9e86432b410 04-Feb-2011 Jason W Kim <jason.w.kim.2009@gmail.com> Teach ARM/MC/ELF about EF_ARM_EABI_VERSION. The magic number is set to
5 to match the current doc.
Added FIXME reminder Make it really configurable later.

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0cf5e3d51dd455a174a8f00cfa6b63c11e535434 23-Jan-2011 Rafael Espindola <rafael.espindola@gmail.com> Delay the creation of eh_frame so that the user can change the defaults.
Add support for SHT_X86_64_UNWIND.

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1c13026e8f94bd332c0979baa9c777da99d48736 23-Jan-2011 Rafael Espindola <rafael.espindola@gmail.com> Remove more duplicated code.

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b84551a14f1c96942eb82408652e633543b0961e 20-Jan-2011 Michael J. Spencer <bigcheesegs@gmail.com> Object: Add ELF support.

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1f6efa3996dd1929fbc129203ce5009b620e6969 29-Nov-2010 Michael J. Spencer <bigcheesegs@gmail.com> Merge System into Support.

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13534672deffb571d90f2c2f0a237c67d5aa0594 23-Nov-2010 Jason W Kim <jason.w.kim.2009@gmail.com> Move the ARM reloc constants to Support/ELF.h

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4b04713423c6da988db75c7546baa3db7ddfa119 21-Nov-2010 Wesley Peck <peckw@wesleypeck.com> Implement ELF object file writing support for the MBlaze backend. Its not perfect yet, but it works for many tests.

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2ff9e83a826c1c2ee0f1c6072d3d97d5b10678ee 11-Nov-2010 Rafael Espindola <rafael.espindola@gmail.com> Initial comdat implementation.

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7be2c33193aeada8c0ff3555ea54b930f204132a 31-Oct-2010 Rafael Espindola <rafael.espindola@gmail.com> Add support for files with more than 65280 sections. No testcase since
it would be a bit too big :-)

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3cede2d0b2b6cc0a06f55da7c2f8e4263ec0091e 27-Oct-2010 Rafael Espindola <rafael.espindola@gmail.com> Add support for R_386_TLS_GD, R_386_TLS_LE_32, R_386_TLS_IE and R_386_TLS_LE.

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cecbc3d28277ff4916326311cbf87335ed05d106 25-Oct-2010 Rafael Espindola <rafael.espindola@gmail.com> Add support for emitting ARM file attributes.

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17ffc5271802e68408bc18a390d8f5dc22c8771a 21-Oct-2010 Wesley Peck <peckw@wesleypeck.com> Adding the EM_MBLAZE value to the machine architectures enumeration to
support future ELF file generation by the MBlaze backend.

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e5b57347e9485b59dd8d70f8f90d7794f473147a 17-Aug-2010 Benjamin Kramer <benny.kra@googlemail.com> Sketch i386 relocations handling, from Roman Divacky.

Hello world builds & runs now on i386/ELF with -integrated-as.

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6b2e257e74b2c8e2f93bb244e0c80cb73005b74a 16-Aug-2010 Matt Fleming <matt@console-pimps.org> Add ELF ObjectWriter and Streamer support.

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b676d9815dc7ce3a14d655322f307f335708155b 20-Jul-2010 Matt Fleming <matt@console-pimps.org> Add the rest of the SHT_* values as defined in the System V ABI
ELF specification.

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1461520f8cba8ebbdfd832d5396079888f1ab96e 16-Jul-2010 Douglas Gregor <dgregor@apple.com> Remove extraneous semicolons after member functions

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53621a1a7376cba5d0a22c12a171933eb8c6d3f6 16-Jul-2010 Eli Friedman <eli.friedman@gmail.com> A few more minor additions to ELF.h.

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9a9ad77847c1be4ffc5ba6304e33ccecbf72e43f 13-Jul-2010 Stephen Wilson <wilsons@start.ca> Bring ELF64 on par with ELF32, add a few magic constants and support ".dynamic"
section entries.

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314451326ad1ef89241b240a704e104897e4ee81 13-Jul-2010 Stephen Wilson <wilsons@start.ca> Simple format/style fixes.

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fe4591bfc2b147c10d6a7b1a5af56454fb78dace 12-Jul-2010 Stephen Wilson <wilsons@start.ca> Test commit.

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004c82ad7c0d2da761726f063373c28ffd18e66d 06-Jul-2010 Matt Fleming <matt@console-pimps.org> Add X86_64 ELF relocation values and ELF64 relocation classes.

Patch from Roman Divacky.

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e07cc5dab102c0f8c3f66c2703c95e547d6bf1c6 06-Jul-2010 Matt Fleming <matt@console-pimps.org> Add some more ELF OSABI values as found in the System V Application
Binary Interface specification.

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5af8f421b6412e52530608097e39d2602195629f 19-Apr-2010 Dan Gohman <gohman@apple.com> Add a few more ELF bits.

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8b67f774e9c38b7718b2b300b628388f966df4e0 26-Oct-2009 Chandler Carruth <chandlerc@gmail.com> Move DataTypes.h to include/llvm/System, update all users. This breaks the last
direct inclusion edge from System to Support.

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cc5fc60468a1915049ef19a549fe4a6ae8708a00 30-May-2009 Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Add AMD64 elf machine type

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4e9ca339b56f082c6b2d7dd7d91f704801c0d4fd 05-Apr-2009 Mikhail Glushenkov <foldr@codedgers.com> Add segment flag bits to ELF.h.

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d68a07650cdb2e18f18f362ba533459aa10e01b6 05-Jan-2009 Dan Gohman <gohman@apple.com> Tidy up #includes, deleting a bunch of unnecessary #includes.

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7ed47a13356daed2a34cd2209a31f92552e3bdd8 29-Dec-2007 Chris Lattner <sabre@nondot.org> Don't attribute in file headers anymore. See llvmdev for the
discussion of this change. Boy are my fingers tired. ;-)

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63b3afa98460ce38a1c48d3c44ef6edfdaf37b77 21-Apr-2005 Misha Brukman <brukman+llvm@gmail.com> Remove trailing whitespace

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551ccae044b0ff658fe629dd67edd5ffe75d10e8 02-Sep-2004 Reid Spencer <rspencer@reidspencer.com> Changes For Bug 352
Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.

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e9f6f2c0492af8097166f1b7d62f131f20ca5714 29-Feb-2004 Brian Gaeke <gaeke@uiuc.edu> Update comment at head of file. Also fix C 'typedef struct' nonsense I
inadvertently left in here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11988 91177308-0d34-0410-b5e6-96231b3b80d8
620ee02353d8b65959dc01a66b073adfcdef9eac 29-Feb-2004 Brian Gaeke <gaeke@uiuc.edu> Add more architectures, and ELF64 stuff.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11985 91177308-0d34-0410-b5e6-96231b3b80d8
757c1f9d87b516a1e3bc4cd678245b207ae9c559 28-Feb-2004 Brian Gaeke <gaeke@uiuc.edu> Fix my sloppiness

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11968 91177308-0d34-0410-b5e6-96231b3b80d8
6c39a42b5c93b6d0af008dbafed6134d1deaa848 28-Feb-2004 Brian Gaeke <gaeke@uiuc.edu> ELF constants and data structures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11945 91177308-0d34-0410-b5e6-96231b3b80d8