| dce4a407a24b04eebc6a376f8e62b41aaa7b071f |
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29-May-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for 3.5 rebase (r209712).
Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/lib/Target/AArch64/AArch64RegisterInfo.h
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| 4393f48c03300203594e22d248808f20dd59d886 |
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07-Jun-2013 |
Bill Wendling <isanbard@gmail.com> |
Don't cache the instruction info and register info objects.
These objects are internal to the TargetMachine object and may change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183485 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AArch64RegisterInfo.h
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| 700ed80d3da5e98e05ceb90e9bfb66058581a6db |
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21-Feb-2013 |
Eli Bendersky <eliben@google.com> |
Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo
to TargetFrameLowering, where it belongs. Incidentally, this allows us
to delete some duplicated (and slightly different!) code in TRI.
There are potentially other layering problems that can be cleaned up
as a result, or in a similar manner.
The refactoring was OK'd by Anton Korobeynikov on llvmdev.
Note: this touches the target interfaces, so out-of-tree targets may
be affected.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175788 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AArch64RegisterInfo.h
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| 5bd6cb2dabf3fea9cb9fa0b275fbc7ceb85ba970 |
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14-Feb-2013 |
Tim Northover <Tim.Northover@arm.com> |
AArch64: add block comments where missing
Only comments affected. No code change at all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175169 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AArch64RegisterInfo.h
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| a9da5c50e246966c04784756e2083dbfe606c448 |
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31-Jan-2013 |
Tim Northover <Tim.Northover@arm.com> |
Update AArch64 backend to changed eliminateFrameIndex interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174086 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AArch64RegisterInfo.h
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| 72062f5744557e270a38192554c3126ea5f97434 |
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31-Jan-2013 |
Tim Northover <Tim.Northover@arm.com> |
Add AArch64 as an experimental target.
This patch adds support for AArch64 (ARM's 64-bit architecture) to
LLVM in the "experimental" category. Currently, it won't be built
unless requested explicitly.
This initial commit should have support for:
+ Assembly of all scalar (i.e. non-NEON, non-Crypto) instructions
(except the late addition CRC instructions).
+ CodeGen features required for C++03 and C99.
+ Compilation for the "small" memory model: code+static data <
4GB.
+ Absolute and position-independent code.
+ GNU-style (i.e. "__thread") TLS.
+ Debugging information.
The principal omission, currently, is performance tuning.
This patch excludes the NEON support also reviewed due to an outbreak of
batshit insanity in our legal department. That will be committed soon bringing
the changes to precisely what has been approved.
Further reviews would be gratefully received.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174054 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AArch64RegisterInfo.h
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