| 36b56886974eae4f9c5ebc96befd3e7bfe5de338 |
|
24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Update to LLVM 3.5a.
Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| b81b477cd4392a51112c3af0659ea9fc176e74f1 |
|
03-Jul-2013 |
Mihai Popa <mihail.popa@gmail.com> |
This corrects the implementation of Thumb ADR instruction. There are three issues:
1. it should accept only 4-byte aligned addresses
2. the maximum offset should be 1020
3. it should be encoded with the offset scaled by two bits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185528 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| f8b60d6f30a8f25c84a71d36ff3a86fe1f52f671 |
|
18-Jun-2013 |
Amaury de la Vieuville <amaury.dlv@gmail.com> |
ARM: add operands pre-writeback variants when needed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184181 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 4e9a96d810eb0cc126ebe6f18e536b474c84940c |
|
10-Jun-2013 |
Amaury de la Vieuville <amaury.dlv@gmail.com> |
ARM: ISB cannot be passed the same options as DMB
ISB should only accepts full system sync, other options are reserved
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183656 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| d64ee4455a9d2fcec7e001c7f4c02d490bed5158 |
|
12-Apr-2013 |
Quentin Colombet <qcolombet@apple.com> |
ARM: Correct printing of pre-indexed operands.
According to the ARM reference manual, constant offsets are mandatory for pre-indexed addressing modes.
The MC disassembler was not obeying this when the offset is 0.
It was producing instructions like: str r0, [r1]!.
Correct syntax is: str r0, [r1, #0]!.
This change modifies the dumping of operands so that the offset is always printed, regardless of its value, when pre-indexed addressing mode is used.
Patch by Mihail Popa <Mihail.Popa@arm.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179398 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| e56764bad10621ac9dcf9d3541533ff2cb0f88b4 |
|
16-Nov-2012 |
Weiming Zhao <weimingz@codeaurora.org> |
Remove hard coded registers in ARM ldrexd and strexd instructions
This patch replaces the hard coded GPR pair [R0, R1] of
Intrinsic:arm_ldrexd and [R2, R3] of Intrinsic:arm_strexd with
even/odd GPRPair reg class.
Similar to the lowering of atomic_64 operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168207 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 8ba1474181fc3997cc8449d75065e1021c72d49b |
|
30-Oct-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM: Better disassembly for pc-relative LDR.
When the operand is a plain immediate rather than a label, print it
as [pc, #imm] like we do for the Thumb2 wide encoding variant.
rdar://12154503
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166991 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 1fb27eccf5b7eabde9678d84411eb1df8a693683 |
|
02-Aug-2012 |
Jiangning Liu <jiangning.liu@arm.com> |
Fix #13241, a bug around shift immediate operand for ARM instruction ADR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161159 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| c97ef618d2d849a272a353c2b4343fc5902cd921 |
|
02-Apr-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Move getOpcodeName from the various target InstPrinters into the superclass MCInstPrinter.
All implementations used the same code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153866 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 7c0b3c1fb6395475e262d66ee403645f0c67dee2 |
|
02-Apr-2012 |
Craig Topper <craig.topper@gmail.com> |
Remove getInstructionName from MCInstPrinter implementations in favor of using the instruction name table from MCInstrInfo. Reduces static data in the InstPrinter implementations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153863 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 17463b3ef1a3d39b10619254f12e806c8c43f9e7 |
|
02-Apr-2012 |
Craig Topper <craig.topper@gmail.com> |
Make MCInstrInfo available to the MCInstPrinter. This will be used to remove getInstructionName and the static data it contains since the same tables are already in MCInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153860 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| c0fc450f0754508871bc70f21e528bf2f1520da1 |
|
06-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM refactor more NEON VLD/VST instructions to use composite physregs
Register pair VLD1/VLD2 all-lanes instructions. Kill off more of the
pseudos as a result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152150 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| bde1b2a5a8cef66f67513c9f4309b7fae798c679 |
|
06-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
Tidy up. Kill some dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152131 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| c3384c93c0e4c50da4ad093f08997507f9281c75 |
|
05-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM Refactor VLD/VST spaced pair instructions.
Use the new composite physical registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152063 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 28f08c93e75d291695ea89b9004145103292e85b |
|
05-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM refactor away a bunch of VLD/VST pseudo instructions.
With the new composite physical registers to represent arbitrary pairs
of DPR registers, we don't need the pseudo-registers anymore. Get rid of
a bunch of them that use DPR register pairs and just use the real
instructions directly instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152045 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| c6449b636f4984be88f128d0375c056ad05e7e8f |
|
05-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
Make MCRegisterInfo available to the the MCInstPrinter.
Used to allow context sensitive printing of super-register or sub-register
references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152043 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 31d157ae1ac2cd9c787dc3c1d28e64c682803844 |
|
18-Feb-2012 |
Jia Liu <proljc@gmail.com> |
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| a57a36abe7d0b769a495ed886246db157aff4add |
|
25-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
NEON VLD4(all lanes) assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148884 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 5e59f7e15ed3770b32481cd72d2c15b159e991e6 |
|
25-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
NEON VLD3(all lanes) assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148882 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 8abe7e33641fccfa70a7e335939e83dfbf654fe8 |
|
24-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
NEON VLD4(multiple 4 element structures) assembly parsing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148762 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| c387fc66bd52e4276fdc2704a3aaed57cc1f9a11 |
|
24-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
NEON VLD3(multiple 3-element structures) assembly parsing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148745 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 4050bc4cab61f8d3c7583a9b60f17c7da47bbf69 |
|
22-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM VFP assembly parsing and encoding for VCVT(float <--> fixed point).
rdar://10558523
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147189 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 3471d4fbbd50eabb12511b711cbd2afd7bb9d962 |
|
21-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM NEON VLD2 assembly parsing for structure to all lanes, non-writeback.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147025 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| e90ac9bce9aa6de288568df9bf6133c08534ae2f |
|
14-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM NEON VST2 assembly parsing and encoding.
Work in progress. Parsing for non-writeback, single spaced register lists
works now. The rest have the representations better factored, but still
need more to be able to parse properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146579 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 13af222bab6fdc77d8193eb38e78a9cbed1d9d1f |
|
30-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM parsing for VLD1 two register all lanes, no writeback.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145504 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 98b05a57b67d1968381563c8cccbbb6c6cb65e3d |
|
30-Nov-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM parsing aliases for VLD1 single register all lanes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145464 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| b6310316dbaf8716003531d7ed245f77f1a76a11 |
|
21-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
Assembly parsing for 4-register variant of VLD1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142682 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| cdcfa280568d5d48ebeba2dcfc87915105e090d1 |
|
21-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
Assembly parsing for 3-register variant of VLD1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142675 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 280dfad48940a0a51726308dd3daa3b1b0d18705 |
|
21-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM VLD parsing and encoding.
Next step in the ongoing saga of NEON load/store assmebly parsing. Handle
VLD1 instructions that take a two-register register list.
Adjust the instruction definitions to only have the single encoded register
as an operand. The super-register from the pseudo is kept as an implicit def,
so passes which come after pseudo-expansion still know that the instruction
defines the other subregs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142670 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 862019c37f5b5d76e34eeb0d5686e617d544059f |
|
19-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM VTBL (one register) assembly parsing and encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142441 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 9b8f2a0b365ea62a5fef80bbaab3cf0252db2fcf |
|
12-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM parsing and encoding for the <option> form of LDC/STC instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141786 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 460a90540b045c102012da2492999557e6840526 |
|
08-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM NEON assembly parsing and encoding for VDUP(scalar).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141446 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 4ebbf7b8a8e80532bd2ddf7209e62689c1698a96 |
|
30-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM fix encoding of VMOV.f32 and VMOV.f64 immediates.
Encode the immediate into its 8-bit form as part of isel rather than later,
which simplifies things for mapping the encoding bits, allows the removal
of the custom disassembler decoding hook, makes the operand printer trivial,
and prepares things more cleanly for handling these in the asm parser.
rdar://10211428
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140834 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 61268701931d747fa95e0be8a368101e7f97b83c |
|
22-Sep-2011 |
Owen Anderson <resistor@mac.com> |
Turns out that Thumb2 ADR doesn't need special printing like LDR does. Fix other test failures I caused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140284 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| e1368729700f1a51ee5cf33431df985e232bcc68 |
|
22-Sep-2011 |
Owen Anderson <resistor@mac.com> |
Print out immediate offset versions of PC-relative load/store instructions as [pc, #123] rather than simply #123.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140283 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 7f739bee261debdf56bd89ac922b57eca53e91dc |
|
20-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 assembly parsing and encoding for TBB/TBH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140078 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 98c5ddabca1debf935a07d14d0cbc9732374bdb8 |
|
16-Sep-2011 |
Owen Anderson <resistor@mac.com> |
Don't attach annotations to MCInst's. Instead, have the disassembler return, and the printer accept, an annotation string which can be passed through if the client cares about annotations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139876 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| b6aed508e310e31dcb080e761ca856127cec0773 |
|
09-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Thumb2 assembly parsing and encoding for LDREX/LDREXB/LDREXD/LDREXH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139381 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| b950585cc5a0d665e9accfe5ce490cd269756f2e |
|
07-Sep-2011 |
James Molloy <james.molloy@arm.com> |
Refactor instprinter and mcdisassembler to take a SubtargetInfo. Add -mattr= handling to llvm-mc. Reviewed by Owen Anderson.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139237 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 70939ee1415722d7f39f13faf9b3644b96007996 |
|
17-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM clean up the imm_sr operand class representation.
Represent the operand value as it will be encoded in the instruction. This
allows removing the specialized encoder and decoder methods entirely. Add
an assembler match class while we're at it to lay groundwork for parsing the
thumb shift instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137879 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| ca8c70b9536bf351ee92395dae6f99a59c011a3d |
|
05-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM use a dedicated printer for postidx_reg operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136968 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 154c41dbbc06284efd56782a8bc137a25148918e |
|
04-Aug-2011 |
Owen Anderson <resistor@mac.com> |
LDCL_POST and STCL_POST need one's-complement offsets, rather than two's complement offsets. Add an appropriate immediate type for them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136896 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 7ce057983ea7b8ad42d5cca1bb5d3f6941662269 |
|
04-Aug-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM refactoring assembly parsing of memory address operands.
Memory operand parsing is a bit haphazzard at the moment, in no small part
due to the even more haphazzard representations of memory operands in the .td
files. Start cleaning that all up, at least a bit.
The addressing modes in the .td files will be being simplified to not be
so monolithic, especially with regards to immediate vs. register offsets
and post-indexed addressing. addrmode3 is on its way with this patch, for
example.
This patch is foundational to enable going back to smaller incremental patches
for the individual memory referencing instructions themselves. It does just
enough to get the basics in place and handle the "make check" regression tests
we already have.
Follow-up work will be fleshing out the details and adding more robust test
cases for the individual instructions, starting with ARM mode and moving from
there into Thumb and Thumb2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136845 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 85bfd3b023d4d70936006eadd86588b03e5f40c0 |
|
26-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM cleanup of rot_imm encoding.
Start of cleaning this up a bit. First step is to remove the encoder hook by
storing the operand as the bits it'll actually encode to so it can just be
directly used. Map it to the assembly source values 8/16/24 when we print it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136152 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| f49433523e8a39db6d83503e312ae55160eed90a |
|
26-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM assembly parsing and encoding for SSAT16 instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136006 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 4a5ffb399f841783c201c599b88d576757f1922e |
|
23-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM SSAT instruction 5-bit immediate handling.
The immediate is in the range 1-32, but is encoded as 0-31 in a 5-bit bitfield.
Update the representation such that we store the operand as 0-31, allowing us
to remove the encoder method and the special case handling in the disassembler.
Update the assembly parser and the instruction printer accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135823 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 152d4a4bb6b75de740b4b8a9f48abb9069d50c17 |
|
22-Jul-2011 |
Owen Anderson <resistor@mac.com> |
Get rid of the extraneous GPR operand on so_reg_imm operands, which in turn necessitates a lot of changes to related bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135722 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| dde038af59506c631ce181aff66e315a0c477f4d |
|
20-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
ARM PKH shift ammount operand printing tweaks.
Move the shift operator and special value (32 encoded as 0 for PKHTB) handling
into the instruction printer. This cleans up a bit of the disassembler
special casing for these instructions, more easily handles not printing the
operand at all for "lsl #0" and prepares for correct asm parsing of these
operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135626 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 589130fac11bc8c186736161600575c3ed6acc5b |
|
11-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
Simplify printing of ARM shifted immediates.
Print shifted immediate values directly rather than as a payload+shifter
value pair. This makes for more readable output assembly code, simplifies
the instruction printer, and is consistent with how Thumb immediates are
displayed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134902 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| b262799d49891b036daa00eddf51947487346c98 |
|
06-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
createMCInstPrinter doesn't need TargetMachine anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134525 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| cde4ce411b1ace4a80ea1dd38df97e8508aed0c9 |
|
02-Jun-2011 |
Rafael Espindola <rafael.espindola@gmail.com> |
Don't hardcode the %reg format in the streamer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132451 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| ac79e4c82f201c30a06c2cd05baebd20f5b49888 |
|
04-Apr-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
- Implement asm parsing support for LDRSBT, LDRHT, LDRSHT and STRHT
also fix the encoding of the later.
- Add a new encoding bit to describe the index mode used in AM3.
- Teach printAddrMode3Operand to check by the addressing mode which
index mode to print.
- Testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128832 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| ae0855401b8c80f96904b6808b0bc4c89216aecd |
|
01-Apr-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Apply again changes to support ARM memory asm parsing. I removed
all LDR/STR changes and left them to a future patch. Passing all
checks now.
- Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and
fix the encoding wherever is possible.
- Add a new encoding bit to describe the index mode used and teach
printAddrMode2Operand to check by the addressing mode which index
mode to print.
- Testcases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128689 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| b41aaab5a1769f4df04d566da37866ac91b6ee9e |
|
31-Mar-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Revert r128632 again, until I figure out what break the tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128635 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| bcd3a9cd84d3bb143075d31bdf631f621f44f9e7 |
|
31-Mar-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Reapply r128585 without generating a lib depedency cycle. An updated log:
- Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and
{STR,LDC}{2}_{PRE,POST} fixing the encoding wherever is possible.
- Move all instructions which use am2offset without a pattern to use
addrmode2.
- Add a new encoding bit to describe the index mode used and teach
printAddrMode2Operand to check by the addressing mode which index
mode to print.
- Testcases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128632 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| e4345c9977e65b14fa4b93d19c7e67a7b15f7f40 |
|
31-Mar-2011 |
Matt Beaumont-Gay <matthewbg@google.com> |
Revert "- Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and"
This revision introduced a dependency cycle, as nlewycky mentioned by email.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128597 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 40829ed6f5e449fa33a9cd7022ce6c3941dace3d |
|
31-Mar-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
- Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and
{STR,LDC}{2}_PRE.
- Fixed the encoding in some places.
- Some of those instructions were using am2offset and now use addrmode2.
Codegen isn't affected, instructions which use SelectAddrMode2Offset were not
touched.
- Teach printAddrMode2Operand to check by the addressing mode which index
mode to print.
- This is a work in progress, more work to come. The idea is to change places
which use am2offset to use addrmode2 instead, as to unify assembly parser.
- Add testcases for assembly parser
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128585 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 505f3cd2965e65b6b7ad023eaba0e3dc89b67409 |
|
24-Mar-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Add asm parsing support w/ testcases for strex/ldrex family of instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128236 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| a5c177e70a42f48e4885075c4c48aad0816a2817 |
|
21-Mar-2011 |
Bill Wendling <isanbard@gmail.com> |
We need to pass the TargetMachine object to the InstPrinter if we are printing
the alias of an InstAlias instead of the thing being aliased. Because we need to
know the features that are valid for an InstAlias.
This is part of a work-in-progress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127986 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| e2189144d45be78a89f0daf3df3cf12e38221d86 |
|
14-Mar-2011 |
Jim Grosbach <grosbach@apple.com> |
Remove some dead patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127601 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 57caad7a33ff145b71545f10dcfbbf2fd0f595d3 |
|
05-Mar-2011 |
Anton Korobeynikov <asl@math.spbu.ru> |
Preliminary support for ARM frame save directives emission via MI flags.
This is just very first approximation how the stuff should be done
(e.g. ARM-only for now). More to follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127101 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| a2b6e4151b75248f9dbf8067186cba673520f8f4 |
|
14-Feb-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Fix encoding and add parsing support for the arm/thumb CPS instruction:
- Add custom operand matching for imod and iflags.
- Rename SplitMnemonicAndCC to SplitMnemonic since it splits more than CC
from mnemonic.
- While adding ".w" as an operand, don't change "Head" to avoid passing the
wrong mnemonic to ParseOperand.
- Add asm parser tests.
- Add disassembler tests just to make sure it can catch all cps versions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125489 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| e4e5e2aae7e1e0e84877061432e7b981a360a77d |
|
13-Jan-2011 |
Owen Anderson <resistor@mac.com> |
Add support to the ARM MC infrastructure to support mcr and friends. This requires supporting
the symbolic immediate names used for these instructions, fixing their pretty-printers, and
adding proper encoding information for them.
With this, we can properly pretty-print and encode assembly like:
mrc p15, #0, r3, c13, c0, #3
Fixes <rdar://problem/8857858>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123404 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| f4caf69720d807573c50d41aa06bcec1c99bdbbd |
|
14-Dec-2010 |
Bill Wendling <isanbard@gmail.com> |
The tLDR et al instructions were emitting either a reg/reg or reg/imm
instruction based on the t_addrmode_s# mode and what it returned. There is some
obvious badness to this. In particular, it's hard to do MC-encoding when the
instruction may change out from underneath you after the t_addrmode_s# variable
is finally resolved.
The solution is to revert a long-ago change that merged the reg/reg and reg/imm
versions. There is the addition of several new addressing modes. They no longer
have extraneous operands associated with them. I.e., if it's reg/reg we don't
have to have a dummy zero immediate tacked on to the SDNode.
There are some obvious cleanups here, which will happen shortly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121747 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 5ca66696e734f963b613de51e3df3684395daf1c |
|
29-Nov-2010 |
Jim Grosbach <grosbach@apple.com> |
Pseudo-ize Thumb2 jump tables with explicit MC lowering to the raw
instructions. This simplifies instruction printing and disassembly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120333 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| f1aa47dc1aed018e2f70ffe7d32dba51e2ac45fe |
|
29-Nov-2010 |
Jim Grosbach <grosbach@apple.com> |
ARM Pseudo-ize tBR_JTr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120310 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 60d5b5fdeec64b69c92db60242d3d90b3f978e69 |
|
14-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
stub out a powerpc MCInstPrinter implementation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119059 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 11c11f8ab0e97150998db2a44cec9d334b0bd154 |
|
13-Nov-2010 |
Evan Cheng <evan.cheng@apple.com> |
For pre-v6t2 targets, only select MOVi32imm if the immediate can be handled with movi + orr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118945 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 2915eb44301f1943df870efe37c424a6e8bdacfe |
|
03-Nov-2010 |
Jim Grosbach <grosbach@apple.com> |
Remove unused function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118141 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 0a2287b909634991a8e8aa7a93f81f09375227b1 |
|
03-Nov-2010 |
Jim Grosbach <grosbach@apple.com> |
Remove the no longer used 'Modifier' optional operand to the ARM
printOperand() asm printer helper functions. rdar://8425198
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118140 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 496e2b2908820348163e2271708c40e8e398315c |
|
03-Nov-2010 |
Jim Grosbach <grosbach@apple.com> |
Remove unused function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118139 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| e6913600c723a10ab1f06a43c93d82ee8e26c71c |
|
03-Nov-2010 |
Jim Grosbach <grosbach@apple.com> |
Break ARM addrmode4 (load/store multiple base address) into its constituent
parts. Represent the operation mode as an optional operand instead.
rdar://8614429
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118137 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 6274ec48b3a3e1fbaf3a359868d53a76f20a4245 |
|
28-Oct-2010 |
Chris Lattner <sabre@nondot.org> |
hook up getOpcodeName for ARM so that "llc -show-mc-inst" includes
the opcode string in the inst dump, e.g.:
vmov r2, r3, d17 @ encoding: [0x31,0x2b,0x53,0xec]
@ <MCInst #989 VMOVRRD
@ <MCOperand Reg:68>
@ <MCOperand Reg:69>
@ <MCOperand Reg:19>
@ <MCOperand Imm:14>
@ <MCOperand Reg:0>>
The "VMOVRRD" is new.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117609 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 458f2dc5d1b0120bd5921582eb1149ea770568bd |
|
25-Oct-2010 |
Jim Grosbach <grosbach@apple.com> |
imm12 operands aren't Thumb2 only, so rename the printer helper function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117291 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| b3af5de2d97c30355b8109e149326b0664d34085 |
|
13-Oct-2010 |
Jim Grosbach <grosbach@apple.com> |
Refactor the ARM 'setend' instruction pattern. Use a single instruction pattern
and handle the operand explicitly. Flesh out encoding information. Add an
explicit disassembler testcase for the instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116432 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 443e625d8a2198c1793833fa1754f78e2492f4c3 |
|
02-Oct-2010 |
Jim Grosbach <grosbach@apple.com> |
PrintSpecial() can go away now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115376 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|
| 7ac1609a3b81504d269bf967060241c309771f23 |
|
02-Oct-2010 |
Jim Grosbach <grosbach@apple.com> |
Rename the AsmPrinter directory to InstPrinter for those targets that have
been MC-ized for assembly printing. MSP430 is mostly so, but still has the
asm printer and lowering code in the printer subdir for the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115360 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
|