| 36b56886974eae4f9c5ebc96befd3e7bfe5de338 |
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24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Update to LLVM 3.5a.
Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/Target/ARM/Thumb2RegisterInfo.h
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| 57148c166ab232191098492633c924fad9c44ef3 |
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07-Jun-2013 |
Bill Wendling <isanbard@gmail.com> |
Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183488 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2RegisterInfo.h
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| c1f6f42049696e7357fb4837e1b25dabbaed3fe6 |
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17-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Reorder includes to match coding standards. Fix an issue or two exposed by that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152978 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2RegisterInfo.h
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| 3daccd82d3151fa3629de430b55698a81084fc9e |
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05-Mar-2011 |
Anton Korobeynikov <asl@math.spbu.ru> |
Implement frame unwinding information emission for Thumb1. Not finished yet because there is no way given the constpool index to examine the actual entry: the reason is clones inserted by constant island pass, which are not tracked at all! The only connection is done during asmprinting time via magic label names which is really gross and needs to be eventually fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127104 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2RegisterInfo.h
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| 31c24bf5b39cc8391d4cfdbf8cf5163975fdb81e |
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07-Nov-2009 |
Jim Grosbach <grosbach@apple.com> |
80-column cleanup of file header comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86408 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2RegisterInfo.h
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| ca5dfb71ba4aa4a8392a021ec056cf0b70f74f1e |
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28-Oct-2009 |
Jim Grosbach <grosbach@apple.com> |
Cleanup now that frame index scavenging via post-pass is working for ARM and Thumb2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85406 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2RegisterInfo.h
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| 6495f63945e8dbde81f03a1dc2ab421993b9a495 |
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28-Jul-2009 |
Evan Cheng <evan.cheng@apple.com> |
- More refactoring. This gets rid of all of the getOpcode calls.
- This change also makes it possible to switch between ARM / Thumb on a
per-function basis.
- Fixed thumb2 routine which expand reg + arbitrary immediate. It was using
using ARM so_imm logic.
- Use movw and movt to do reg + imm when profitable.
- Other code clean ups and minor optimizations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77300 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2RegisterInfo.h
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| 30b2bdfa734d59bb7bc769dc2f06e4900a77f6f8 |
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26-Jul-2009 |
Evan Cheng <evan.cheng@apple.com> |
Refactor. Get rid of a few more getOpcode() calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77164 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2RegisterInfo.h
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| 5ff58b5c3ab6df332600678798ea5c69c5e943d3 |
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24-Jul-2009 |
David Goodwin <david_goodwin@apple.com> |
Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index elimination more exactly for Thumb-2 to get better code gen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76919 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2RegisterInfo.h
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| 378445303b10b092a898a75131141a8259cff50b |
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16-Jul-2009 |
Evan Cheng <evan.cheng@apple.com> |
Let callers decide the sub-register index on the def operand of rematerialized instructions.
Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75900 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2RegisterInfo.h
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| f1daf7d8abebd6e0104a6b41a774ccbb19a51c60 |
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09-Jul-2009 |
David Goodwin <david_goodwin@apple.com> |
Use common code for both ARM and Thumb-2 instruction and register info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75067 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2RegisterInfo.h
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| 77521f5232e679aa3de10aaaed2464aa91d7ff55 |
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08-Jul-2009 |
David Goodwin <david_goodwin@apple.com> |
Generalize opcode selection in ARMBaseRegisterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75036 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2RegisterInfo.h
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| db5a71a8e01ed9a0d93a19176df6ea0aea510d7b |
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08-Jul-2009 |
David Goodwin <david_goodwin@apple.com> |
Push methods into base class in preparation for sharing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75020 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2RegisterInfo.h
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| b50ea5c48f8b1ce259e034ca5c16dc14af1a582c |
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03-Jul-2009 |
David Goodwin <david_goodwin@apple.com> |
Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1InstrInfo, Thumb2InstrInfo, Thumb1RegisterInfo and Thumb2RegisterInfo. Move methods from ARMInstrInfo to ARMBaseInstrInfo to prepare for sharing with Thumb2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74731 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2RegisterInfo.h
|