cd81d94322a39503e4a3e87b6ee03d4fcb3465fb |
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21-Jul-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for rebase to r212749. Includes a cherry-pick of: r212948 - fixes a small issue with atomic calls Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
/external/llvm/lib/Target/R600/AMDGPUSubtarget.cpp
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dce4a407a24b04eebc6a376f8e62b41aaa7b071f |
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29-May-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for 3.5 rebase (r209712). Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/lib/Target/R600/AMDGPUSubtarget.cpp
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36b56886974eae4f9c5ebc96befd3e7bfe5de338 |
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24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Update to LLVM 3.5a. Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/Target/R600/AMDGPUSubtarget.cpp
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b570599c8f048c2eda78edb9304bd8e283fb6908 |
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18-Nov-2013 |
Tom Stellard <thomas.stellard@amd.com> |
R600: Enable the IR structurizer by default git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195031 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/AMDGPUSubtarget.cpp
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ef37e453c407675ab5934d2f6bcec706b7810878 |
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18-Nov-2013 |
Tom Stellard <thomas.stellard@amd.com> |
R600: Add a SubtargetFeatture for disabling the ifcvt pass. This is useful when writing test cases for the AMDIL structurizer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195029 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/AMDGPUSubtarget.cpp
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de28bdadff78ceea6bb05e23dc3b4cc92fa359ed |
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10-Oct-2013 |
Tom Stellard <thomas.stellard@amd.com> |
R600: Use StructurizeCFGPass for non SI targets StructurizeCFG pass allows to make complex cfg reducible ; it allows a lot of shader from shadertoy (which exhibits complex control flow constructs) to works correctly with respect to CFG handling (and allow us to detect potential bug in other part of the backend). We provide a cmd line argument to disable the pass for debug purpose. Patch by: Vincent Lejeune Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192363 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/AMDGPUSubtarget.cpp
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da25cd3e6de8f21005590c2de49868f883cf2410 |
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26-Aug-2013 |
Tom Stellard <thomas.stellard@amd.com> |
SelectionDAG: Use correct pointer size when lowering function arguments v2 This adds minimal support to the SelectionDAG for handling address spaces with different pointer sizes. The SelectionDAG should now correctly lower pointer function arguments to the correct size as well as generate the correct code when lowering getelementptr. This patch also updates the R600 DataLayout to use 32-bit pointers for the local address space. v2: - Add more helper functions to TargetLoweringBase - Use CHECK-LABEL for tests git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189221 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/AMDGPUSubtarget.cpp
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1edd1a336a79c4cb804d32cb492738549154c69c |
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18-Aug-2013 |
Dmitri Gribenko <gribozavr@gmail.com> |
Remove unused stdio.h includes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188626 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/AMDGPUSubtarget.cpp
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3ff0abfaabc2c7f604d490be587b9c27e7c91ac0 |
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07-Jun-2013 |
Tom Stellard <thomas.stellard@amd.com> |
R600: Rework subtarget info and remove AMDILDevice classes This should simplify the subtarget definitions and make it easier to add new ones. Reviewed-by: Vincent Lejeune <vljn@ovi.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183566 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/AMDGPUSubtarget.cpp
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ce961477be78b3945e6ec4b7e22066f237a89846 |
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07-Jun-2013 |
Tom Stellard <thomas.stellard@amd.com> |
R600: Fix the fetch limits for R600 generation GPUs Reviewed-by: Vincent Lejeune <vljn@ovi.com> https://bugs.freedesktop.org/show_bug.cgi?id=64257 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183560 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/AMDGPUSubtarget.cpp
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92b4f2034671ba174a56c88f3e39e0ec7afb7374 |
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29-May-2013 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Temporary fix to get rid of gcc warning. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182832 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/AMDGPUSubtarget.cpp
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dcfcf1d1ffe72d9c25564a2b8b53763a28648e97 |
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17-May-2013 |
Vincent Lejeune <vljn@ovi.com> |
R600: Factorize Fetch size limit inside AMDGPUSubTarget git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182122 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/AMDGPUSubtarget.cpp
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631591e6f3e5119d8a8b1c853279bc4ac7ace4a0 |
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30-Apr-2013 |
Vincent Lejeune <vljn@ovi.com> |
R600: Add FetchInst bit to instruction defs to denote vertex/tex instructions v2[Vincent Lejeune]: Split FetchInst into usesTextureCache/usesVertexCache git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180755 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/AMDGPUSubtarget.cpp
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f98f2ce29e6e2996fa58f38979143eceaa818335 |
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11-Dec-2012 |
Tom Stellard <thomas.stellard@amd.com> |
Add R600 backend A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169915 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/AMDGPUSubtarget.cpp
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