cd81d94322a39503e4a3e87b6ee03d4fcb3465fb |
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21-Jul-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for rebase to r212749. Includes a cherry-pick of: r212948 - fixes a small issue with atomic calls Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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dce4a407a24b04eebc6a376f8e62b41aaa7b071f |
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29-May-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for 3.5 rebase (r209712). Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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36b56886974eae4f9c5ebc96befd3e7bfe5de338 |
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24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Update to LLVM 3.5a. Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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1edd1a336a79c4cb804d32cb492738549154c69c |
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18-Aug-2013 |
Dmitri Gribenko <gribozavr@gmail.com> |
Remove unused stdio.h includes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188626 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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d6055262d23b1a8f2b5c74ab94fc6c143aca1c45 |
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15-Jun-2013 |
Tom Stellard <thomas.stellard@amd.com> |
R600: Use correct encoding for Vertex Fetch instructions on Cayman Reviewed-by: Vincent Lejeune<vljn at ovi.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184016 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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7eac03220344d1b558ea6690cf73d2b76c7e551e |
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23-May-2013 |
Rafael Espindola <rafael.espindola@gmail.com> |
Fix 32 bit build in c++11 mode. The error was: error: non-constant-expression cannot be narrowed from type 'long long' to 'long' in initializer list [-Wc++11-narrowing] MI.getOperand(6).getImm() & 0x1F, git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182584 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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2134219b654641a7e813d593f4491ad18133963c |
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22-May-2013 |
Rafael Espindola <rafael.espindola@gmail.com> |
s/u_int32_t/uint32_t/ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182444 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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eee6cdd7819b66e0d95a7a18337569b981374937 |
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18-May-2013 |
Rafael Espindola <rafael.espindola@gmail.com> |
Fix the build in c++11 mode. The errors were: non-constant-expression cannot be narrowed from type 'int64_t' (aka 'long') to 'uint32_t' (aka 'unsigned int') in initializer list and non-constant-expression cannot be narrowed from type 'long' to 'uint32_t' (aka 'unsigned int') in initializer list git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182168 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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d3293b49f9c7af741d2edd3062499fb50db0e89b |
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17-May-2013 |
Vincent Lejeune <vljn@ovi.com> |
R600: Improve texture handling git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182125 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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0976e3c6d9b1bfaea1267188e6a20dc41318832a |
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17-May-2013 |
Tom Stellard <thomas.stellard@amd.com> |
R600: Fix encoding for R600 family GPUs Reviewed-by: Vincent Lejeune <vljn@ovi.com> https://bugs.freedesktop.org/show_bug.cgi?id=64193 https://bugs.freedesktop.org/show_bug.cgi?id=64257 https://bugs.freedesktop.org/show_bug.cgi?id=64320 NOTE: This is a candidate for the 3.3 branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182113 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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34f533a6c351d8b255810c9b4b8713700e66ee88 |
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17-May-2013 |
Tom Stellard <thomas.stellard@amd.com> |
R600: Pass MCSubtargetInfo reference to R600CodeEmitter git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182112 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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6eb70ac034a4b23a129fa674dd9852b6d3a615c8 |
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13-May-2013 |
Rafael Espindola <rafael.espindola@gmail.com> |
Remove unused fields and arguments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181706 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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32c76107d029c1cad5935d08cdcde6139cf874bb |
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06-May-2013 |
Tom Stellard <thomas.stellard@amd.com> |
R600: Remove dead code from the CodeEmitter v2 v2: - Replace switch statement with TSFlags query Reviewed-by: Vincent Lejeune <vljn@ovi.com> Tested-By: Aaron Watry <awatry@gmail.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181229 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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4f3d8a644043f85063ef7aac1ff87bfd4d83ca4c |
|
06-May-2013 |
Tom Stellard <thomas.stellard@amd.com> |
R600: Stop emitting the instruction type byte before each instruction Reviewed-by: Vincent Lejeune <vljn@ovi.com> Tested-By: Aaron Watry <awatry@gmail.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181225 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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58bf662c066bfd11aa945335440be96eee0e06d1 |
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06-May-2013 |
Tom Stellard <thomas.stellard@amd.com> |
R600: Emit ISA for CALL_FS_* instructions Reviewed-by: Vincent Lejeune <vljn@ovi.com> Tested-By: Aaron Watry <awatry@gmail.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181223 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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2c836f84dba99e7b041909160c739db779760b79 |
|
30-Apr-2013 |
Vincent Lejeune <vljn@ovi.com> |
R600: use native for alu git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180761 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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e332e3559b5c09040de1528920006756e0962d6a |
|
30-Apr-2013 |
Vincent Lejeune <vljn@ovi.com> |
R600: Add a Bank Swizzle operand git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180758 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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b6379de427c009284d47c5fc764f11bbd2bf2484 |
|
30-Apr-2013 |
Vincent Lejeune <vljn@ovi.com> |
R600: Turn TEX/VTX into native instructions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180756 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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2a74639bc7713146b1182328892807c421c84265 |
|
23-Apr-2013 |
Vincent Lejeune <vljn@ovi.com> |
R600: Use .AMDGPU.config section to emit stacksize git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180124 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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7a28d8afa77ac3afce265f2b61fb321e4e0d84d7 |
|
23-Apr-2013 |
Vincent Lejeune <vljn@ovi.com> |
R600: Add CF_END git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180123 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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58df169e82a933c36d85bf3d979741ac1535044f |
|
17-Apr-2013 |
Vincent Lejeune <vljn@ovi.com> |
R600: Export is emitted as a CF_NATIVE inst git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179685 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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bd7c634ab90ed63ee409fe781360cd42b05780f3 |
|
08-Apr-2013 |
Vincent Lejeune <vljn@ovi.com> |
R600: Control Flow support for pre EG gen git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179020 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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af6f407432b0ef52efd82bd0da7256278e6efc58 |
|
04-Apr-2013 |
Vincent Lejeune <vljn@ovi.com> |
R600: Use a mask for offsets when encoding instructions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178763 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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08001a5a1565adb8ce18b97537dd75075992d09a |
|
01-Apr-2013 |
Vincent Lejeune <vljn@ovi.com> |
R600: Add support for native control flow git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178505 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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8e59191eb8033133f5b2923d2056d4362af913ce |
|
01-Apr-2013 |
Vincent Lejeune <vljn@ovi.com> |
R600: Emit CF_ALU and use true kcache register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178503 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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2691fe98a74bff1ff12e23ff67fc23a9f5fae485 |
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31-Mar-2013 |
Vincent Lejeune <vljn@ovi.com> |
R600: Emit native instructions for tex git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178452 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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a39058aaed4540fc37681cad728b99546595b2e8 |
|
19-Feb-2013 |
David Blaikie <dblaikie@gmail.com> |
Use LLVM_DELETED_FUNCTION rather than '// do not implement' comments. Also removes some redundant DNI comments on function declarations already using the macro. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175466 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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bbbef49118809c6a8d424a9434a70c0fdc3a66d5 |
|
18-Feb-2013 |
Vincent Lejeune <vljn@ovi.com> |
R600: Support for TBO NOTE: This is a candidate for the Mesa stable branch. Reviewed-by: Tom Stellard <thomas.stellard at amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175445 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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76308d8d287e427cce8ea4374acc8e78648dcf79 |
|
13-Feb-2013 |
Tom Stellard <thomas.stellard@amd.com> |
R600: Add support for 128-bit parameters NOTE: This is a candidate for the Mesa stable branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175096 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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9f7818d9bdfce2e9c7a2cbe31490a135aa6d1211 |
|
23-Jan-2013 |
Tom Stellard <thomas.stellard@amd.com> |
R600: rework handling of the constants Remove Cxxx registers, add new special register - "ALU_CONST" and new operand for each alu src - "sel". ALU_CONST is used to designate that the new operand contains the value to override src.sel, src.kc_bank, src.chan for constants in the driver. Patch by: Vadim Girlin Vincent Lejeune: - Use pointers for constants - Fold CONST_ADDRESS when possible Tom Stellard: - Give CONSTANT_BUFFER_0 its own address space - Use integer types for constant loads Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173222 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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58a2cbef4aac9ee7d530dfb690c78d6fc11a2371 |
|
02-Jan-2013 |
Chandler Carruth <chandlerc@gmail.com> |
Resort the #include lines in include/... and lib/... with the utils/sort_includes.py script. Most of these are updating the new R600 target and fixing up a few regressions that have creeped in since the last time I sorted the includes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171362 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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f98f2ce29e6e2996fa58f38979143eceaa818335 |
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11-Dec-2012 |
Tom Stellard <thomas.stellard@amd.com> |
Add R600 backend A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169915 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
|