| cd81d94322a39503e4a3e87b6ee03d4fcb3465fb |
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21-Jul-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for rebase to r212749.
Includes a cherry-pick of:
r212948 - fixes a small issue with atomic calls
Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
/external/llvm/lib/Target/R600/SIInsertWaits.cpp
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| dce4a407a24b04eebc6a376f8e62b41aaa7b071f |
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29-May-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for 3.5 rebase (r209712).
Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/lib/Target/R600/SIInsertWaits.cpp
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| 36b56886974eae4f9c5ebc96befd3e7bfe5de338 |
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24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Update to LLVM 3.5a.
Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/Target/R600/SIInsertWaits.cpp
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| a2b4eb6d15a13de257319ac6231b5ab622cd02b1 |
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14-Nov-2013 |
Tom Stellard <thomas.stellard@amd.com> |
R600/SI: Add support for private address space load/store
Private address space is emulated using the register file with
MOVRELS and MOVRELD instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194626 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/SIInsertWaits.cpp
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| ebd4eec5386e946dc80f4d80e803125af55c2a68 |
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16-Aug-2013 |
Michel Danzer <michel.daenzer@amd.com> |
R600/SI: Fix broken encoding of DS_WRITE_B32
The logic in SIInsertWaits::getHwCounts() only really made sense for SMRD
instructions, and trying to shoehorn it into handling DS_WRITE_B32 caused
it to corrupt the encoding of that by clobbering the first operand with
the second one.
Undo that damage and only apply the SMRD logic to that.
Fixes some derivates related piglit regressions with radeonsi.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188558 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/SIInsertWaits.cpp
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| b07ec9606813cf16b137f0bb9ce09ca7ce57f026 |
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16-Aug-2013 |
Tom Stellard <thomas.stellard@amd.com> |
Revert "R600/SI: Fix incorrect encoding of DS_WRITE_B32 instructions"
This reverts commit a6a39ced095c2f453624ce62c4aead25db41a18f.
This is the wrong version of this fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188523 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/SIInsertWaits.cpp
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| a6a39ced095c2f453624ce62c4aead25db41a18f |
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16-Aug-2013 |
Tom Stellard <thomas.stellard@amd.com> |
R600/SI: Fix incorrect encoding of DS_WRITE_B32 instructions
The SIInsertWaits pass was overwriting the first operand (gds bit) of
DS_WRITE_B32 with the second operand (value to write). This meant that
any time the value to write was stored in an odd number VGPR, the gds
bit would be set causing the instruction to write to GDS instead of LDS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188522 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/SIInsertWaits.cpp
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| 8f3562bc6b914154532bbe592503662ca314ebb8 |
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07-Aug-2013 |
Evgeniy Stepanov <eugeni.stepanov@gmail.com> |
Initialize SIInsertWaits::ExpInstrTypesSeen in the pass constructor.
This value may be used uninitialized in SIInsertWaits::insertWait.
Found with MemorySanitizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187869 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/SIInsertWaits.cpp
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| 7740daa8ba053294b7448556c049cf6778711d66 |
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10-Jul-2013 |
Michel Danzer <michel.daenzer@amd.com> |
R600/SI: Initial support for LDS/GDS instructions
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186009 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/SIInsertWaits.cpp
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| b5632b5b456db647b42239cbd4d8b58c82290c4e |
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07-Jun-2013 |
Bill Wendling <isanbard@gmail.com> |
Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.
No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183561 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/SIInsertWaits.cpp
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| ae621a2bc99eb3870b90120d1f1552dd96f04bb7 |
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18-Mar-2013 |
Christian Konig <christian.koenig@amd.com> |
R600/SI: fix inserting waits for all defines
Unfortunately the previous fix for inserting waits for unordered
defines wasn't sufficient, cause it's possible that even ordered
defines are only partially used (or not used at all).
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177271 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/SIInsertWaits.cpp
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| 9ff8dc8ecd40c6db69778ec4e476a2074facf7e0 |
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01-Mar-2013 |
Christian Konig <christian.koenig@amd.com> |
R600/SI: fix inserting waits for unordered defines
Signed-off-by: Christian König <christian.koenig@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176342 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/SIInsertWaits.cpp
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| 82d3d4524f2595b2dce617e963b6d67876b4f9ba |
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18-Jan-2013 |
Tom Stellard <thomas.stellard@amd.com> |
R600: Proper insert S_WAITCNT instructions
Some instructions like memory reads/writes are executed
asynchronously, so we need to insert S_WAITCNT instructions
to block before accessing their results. Previously we have
just inserted S_WAITCNT instructions after each async
instruction, this patch fixes this and adds a prober
insertion pass.
Patch by: Christian König
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172846 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/SIInsertWaits.cpp
|