History log of /external/llvm/test/MC/ARM/thumb-hints.s
Revision Date Author Comments (<<< Hide modified files) (Show modified files >>>)
f635ab8eabb06a41fa791d897ebf32eb338688a0 05-Nov-2013 Tim Northover <tnorthover@apple.com> ARM: permit bare dmb/dsb/isb aliases on Cortex-M0

Cortex-M0 supports these 32-bit instructions despite being Thumb1 only
(mostly). We knew about that but not that the aliases without the default "sy"
operand were also permitted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194094 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/thumb-hints.s
cf3e4cb29a5fd485f11354060bb7a99e8cfdaf09 07-Oct-2013 Tim Northover <tnorthover@apple.com> ARM: allow cortex-m0 to use hint instructions

The hint instructions ("nop", "yield", etc) are mostly Thumb2-only, but have
been ported across to the v6M architecture. Fortunately, v6M seems to sit
nicely between v6 (thumb-1 only) and v6T2, so we can add a feature for it
fairly easily.

rdar://problem/15144406

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192097 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/thumb-hints.s