| 541c5de2fb57b2f459f0ec49f33a0ecce3532acd |
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13-Nov-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Add the general form of BCR
At the moment this is just the MC support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194585 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/SystemZ/insn-good.s
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| e2d6f91d63a2e8cf77b07794cda7d9ef72504769 |
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18-Sep-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Add unsigned compare-and-branch instructions
For some reason I never got around to adding these at the same time as
the signed versions. No idea why.
I'm not sure whether this SystemZII::BranchC* stuff is useful, or whether
it should just be replaced with an "is normal" flag. I'll leave that
for later though.
There are some boundary conditions that can be tweaked, such as preferring
unsigned comparisons for equality with [128, 256), and "<= 255" over "< 256",
but again I'll leave those for a separate patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190930 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/SystemZ/insn-good.s
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| 299fdd814f4c2850d44387d24c440980c5377d3e |
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10-Sep-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Add TM and TMY
The main complication here is that TM and TMY (the memory forms) set
CC differently from the register forms. When the tested bits contain
some 0s and some 1s, the register forms set CC to 1 or 2 based on the
value the uppermost bit. The memory forms instead set CC to 1
regardless of the uppermost bit.
Until now, I've tried to make it so that a branch never tests for an
impossible CC value. E.g. NR only sets CC to 0 or 1, so branches on the
result will only test for 0 or 1. Originally I'd tried to do the same
thing for TM and TMY by using custom matching code in ISelDAGToDAG.
That ended up being very ugly though, and would have meant duplicating
some of the chain checks that the common isel code does.
I've therefore gone for the simpler alternative of adding an extra
operand to the TM DAG opcode to say whether a memory form would be OK.
This means that the inverse of a "TM;JE" is "TM;JNE" rather than the
more precise "TM;JNLE", just like the inverse of "TMLL;JE" is "TMLL;JNE".
I suppose that's arguably less confusing though...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190400 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/SystemZ/insn-good.s
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| 16277c4698f36a756c540fae326874774156aaed |
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05-Sep-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Add NC, OC and XC
For now these are just used to handle scalar ANDs, ORs and XORs in which
all operands are memory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190041 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/SystemZ/insn-good.s
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| 477168192c98e1f75a5bc6db3d34a177f327bd34 |
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28-Aug-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Add support for TMHH, TMHL, TMLH and TMLL
For now just handles simple comparisons of an ANDed value with zero.
The CC value provides enough information to do any comparison for a
2-bit mask, and some nonzero comparisons with more populated masks,
but that's all future work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189469 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/SystemZ/insn-good.s
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| a550b51bac50493db75a7b5788a3f2c3b62fd913 |
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23-Aug-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Add basic prefetch support
Just the instructions and intrinsics for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189100 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/SystemZ/insn-good.s
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| d4a37e61378949835d93df6b8e4a9feadb4edeef |
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19-Aug-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Add negative integer absolute (load negative)
For now this matches the equivalent of (neg (abs ...)), which did hit a few
times in projects/test-suite. We should probably also match cases where
absolute-like selects are used with reversed arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188671 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/SystemZ/insn-good.s
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| b0d40a22e5aa1a51913fa161c2ce5513d7bd9293 |
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19-Aug-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Add integer absolute (load positive)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188670 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/SystemZ/insn-good.s
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| 19262ee0725a09b7c621a3d2eb66ba1513ae932a |
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16-Aug-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Use SRST to implement strlen and strnlen
It would also make sense to use it for memchr; I'm working on that now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188547 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/SystemZ/insn-good.s
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| 4fc7355a21e1fa838406e15459aaf54a58fcf909 |
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16-Aug-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Use MVST to implement strcpy and stpcpy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188546 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/SystemZ/insn-good.s
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| e1b2af731e2a45344a7c502232f66c55cd746da0 |
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16-Aug-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Use CLST to implement strcmp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188544 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/SystemZ/insn-good.s
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| e03a56d62fc623e2f72d623b816f91b293d5904b |
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12-Aug-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Add a definition of the CLC instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188162 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/SystemZ/insn-good.s
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| f37c8feb468a0e1876c08bdeb449bdb5999c0534 |
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12-Aug-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Add a definition of the IPM instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188161 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/SystemZ/insn-good.s
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| e0bbf7288c00c377a97a9d4bf5fb0bf20c44cd1c |
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07-Aug-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Add floating-point load-and-test instructions
These instructions can also be used as comparisons with zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187882 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/SystemZ/insn-good.s
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| ccdf5cc7bc443726425dd1ad498d44768332d49c |
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05-Aug-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Add definitions for BRCT and BRCTG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187721 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/SystemZ/insn-good.s
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| 0e4044c233d10596578df35bae2483fbe4e8a507 |
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05-Aug-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Add LOAD AND TEST instructions
Just the definitions and MC support. The next patch uses them for codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187719 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/SystemZ/insn-good.s
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| eddfaad1ef9a208a8a9ee23c26fac4d980caa99a |
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19-Jul-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Start adding z196 and zEC12 support
This first step just adds definitions for SLLK, SRLK and SRAK.
The next patch will actually make use of them during codegen.
insn-bad.s tests that some form of error is reported when using these
instructions on z10. More work is needed to get the "instruction requires:
distinct-ops" that we'd ideally like, so I've stubbed that part out for now.
I'll come back and make it mandatory once the necessary changes are in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186680 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/SystemZ/insn-good.s
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| c25d21e05b76e9c542e3bea6a9a12a77772beb14 |
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16-Jul-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Add MC support for R[NOX]SBG
CodeGen support will come later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186401 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/SystemZ/insn-good.s
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| 3ee0673e4f5f0324ecd0a65507009b0748ed072c |
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11-Jul-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Allow 8-bit operands to RISBG
RISBG has three 8-bit operands (I3, I4 and I5). I'd originally
restricted all three to 6 bits, since that's the only range we intended
to use at the time. However, the top bit of I4 acts as a "zero" flag for
RISBG, while the top bit of I3 acts as a "test" flag for RNSBG & co.
This patch therefore allows them to have the full 8-bit range.
I've left the fifth operand as a 6-bit value for now since the
upper 2 bits have no defined meaning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186070 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/SystemZ/insn-good.s
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| 9188443a2d35352c4e8a2cffd1b4d31d47843b26 |
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02-Jul-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Add the MVC instruction
This is the first use of D(L,B) addressing, which required a fair bit
of surgery. For that reason, the patch just adds the instruction
definition and the associated assembler and disassembler support.
A later patch will actually make use of it for codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185433 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/SystemZ/insn-good.s
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| 2d664abbfca8b9fa3d99e8a2f74bd52faf007f12 |
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29-May-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Immediate compare-and-branch support
This patch adds support for the CIJ and CGIJ instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182846 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/SystemZ/insn-good.s
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| d50bcb2162a529534da42748ab4a418bfc9aaf06 |
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28-May-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Register compare-and-branch support
This patch adds support for the CRJ and CGRJ instructions. Support for
the immediate forms will be a separate patch.
The architecture has a large number of comparison instructions. I think
it's generally better to concentrate on using the "best" comparison
instruction first and foremost, then only use something like CRJ if
CR really was the natual choice of comparison instruction. The patch
therefore opportunistically converts separate CR and BRC instructions
into a single CRJ while emitting instructions in ISelLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182764 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/SystemZ/insn-good.s
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| ddbf053a4cad58393a389f264c51923111eba3db |
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15-May-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Make use of SUBTRACT HALFWORD
Thanks to Ulrich Weigand for noticing that this instruction was missing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181893 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/SystemZ/insn-good.s
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| 8580e79fba028e6d6085033617c0c566034cad54 |
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15-May-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Consolidate assembler tests into 4 big tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/SystemZ/insn-good.s
|