| 36b56886974eae4f9c5ebc96befd3e7bfe5de338 |
|
24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Update to LLVM 3.5a.
Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/test/MC/X86/x86-32.s
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| 9b8b830f3fa6dca2275dcd86bdaf0d78ab1651a1 |
|
23-Jul-2013 |
Craig Topper <craig.topper@gmail.com> |
Don't let x86 asm printer use the no operand movsd alias. It should use the normal movsl instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186924 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
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| 0d82fe77f2b6f48b5fab131c1671169d154f8c69 |
|
11-Apr-2012 |
Charles Davis <cdavis@mines.edu> |
Add retw and lretw instructions. Also, fix Intel syntax parsing for all
ret instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154468 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
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| b80d571ea85db5d52fafed0523cf59e693502198 |
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23-Feb-2012 |
Kevin Enderby <enderby@apple.com> |
Updated the llvm-mc disassembler C API to support for the X86 target.
rdar://10873652
As part of this I updated the llvm-mc disassembler C API to always call the
SymbolLookUp call back even if there is no getOpInfo call back. If there is a
getOpInfo call back that is tried first and then if that gets no information
then the SymbolLookUp is called. I also made the code more robust by
memset(3)'ing to zero the LLVMOpInfo1 struct before then setting
SymbolicOp.Value before for the call to getOpInfo. And also don't use any
values from the LLVMOpInfo1 struct if getOpInfo returns 0. And also don't
use any of the ReferenceType or ReferenceName values from SymbolLookUp if it
returns NULL. rdar://10873563 and rdar://10873683
For the X86 target also fixed bugs so the annotations get printed.
Also fixed a few places in the ARM target that was not producing symbolic
operands for some instructions. rdar://10878166
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151267 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
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| 28a713b20ad17f9a02d4677d8a2fea0edb208418 |
|
19-Feb-2012 |
Craig Topper <craig.topper@gmail.com> |
Add vmfunc instruction to X86 assembler and disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150899 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
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| 9e3d0b335111b2df73984a6cfd9ef1cd5d323872 |
|
18-Feb-2012 |
Craig Topper <craig.topper@gmail.com> |
Add X86 assembler and disassembler support for AMD SVM instructions. Original patch by Kay Tiong Khoo. Few tweaks by me for code density and to reduce replication.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150873 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
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| 25f6dfd108801d1dc5877c420ef0dd47131aeda7 |
|
07-Oct-2011 |
Craig Topper <craig.topper@gmail.com> |
Revert part of r141274. Only need to change encoding for xchg %eax, %eax in 64-bit mode. This is because in 64-bit mode xchg %eax, %eax implies zeroing the upper 32-bits of RAX which makes it not a NOP. In 32-bit mode using NOP encoding is fine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141353 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
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| 7ea16b01fad5236cc132cb5fc3e443fcbf70d3b8 |
|
06-Oct-2011 |
Craig Topper <craig.topper@gmail.com> |
Fix assembling of xchg %eax, %eax to not use the NOP encoding of 0x90. This was done by creating a new register group that excludes AX registers. Fixes PR10345. Also added aliases for flipping the order of the operands of xchg <reg>, %eax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141274 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
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| d521d8bf923b2f4b3e44a4ae2ebd0dcb59d7b23b |
|
23-May-2011 |
Chris Lattner <sabre@nondot.org> |
add test from PR9164
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131876 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
|
| b8a21ad91556903d055bb1de47f75655ca4e9ba6 |
|
23-May-2011 |
Chris Lattner <sabre@nondot.org> |
testcase for PR9378
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131875 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
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| c6df9883da99915d1cfa491b381ffa703c61ed90 |
|
14-Apr-2011 |
Bill Wendling <isanbard@gmail.com> |
Have the X86 back-end emit the alias instead of what's being aliased. In most
cases, it's much nicer and more informative reading the alias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129497 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
|
| 96622aa063435b1de085489f0e3e49b5912c22da |
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18-Mar-2011 |
Joerg Sonnenberger <joerg@bec.de> |
Support explicit argument forms for the X86 string instructions.
For now, only the default segments are supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127875 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
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| ac39bd534be9a8022c09cc8be81db2de109baecb |
|
04-Mar-2011 |
Eli Friedman <eli.friedman@gmail.com> |
PR9377: Handle x86 str with register operand in a way consistent with gas.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126970 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
|
| d86f482e4a9d71596e4f81afb0f7912ab3e40a7f |
|
22-Feb-2011 |
Joerg Sonnenberger <joerg@bec.de> |
Recognize loopz and loopnz as aliases for loope and loopne.
From Dimitry Andric.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126168 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
|
| 5ad596f9d27a67767118857471e63b55bfb152d6 |
|
18-Feb-2011 |
Joerg Sonnenberger <joerg@bec.de> |
Recognize monitor/mwait with explicit register arguments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125805 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
|
| d8f717911dcdccb1a60b3049ea22c7767970dcb7 |
|
28-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
fix PR8686, accepting a 'b' suffix at the end of all the setcc
instructions. I choose to handle this with an asmparser hack,
though it could be handled by changing all the instruction definitions
to allow be "setneb" instead of "setne". The asm parser hack is
better in this case, because we want the disassembler to produce
setne, not setneb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120260 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
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| db28788e4ae01c3fa8003773fc236768e87f6917 |
|
06-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
go to great lengths to work around a GAS bug my previous patch
exposed:
GAS doesn't accept "fcomip %st(1)", it requires "fcomip %st(1), %st(0)"
even though st(0) is implicit in all other fp stack instructions.
Fortunately, there is an alias for fcomip named "fcompi" and gas does
accept the default argument for the alias (boggle!).
As such, switch the canonical form of this instruction to "pi" instead
of "ip". This makes the code generator and disassembler generate pi,
avoiding the gas bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118356 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
|
| 235705b9ca08b66532528930adf9d9c23fd7b42b |
|
06-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
change the fp comparison instructions to not have %st0 explicitly
listed in its asm string, for consistency with the other similar
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118354 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
|
| 1a1ecc9f3c2684249bd765d1299302d629aaf4fe |
|
30-Oct-2010 |
Chris Lattner <sabre@nondot.org> |
fix an encoding mismatch where "sal %eax, 1" was not using the short encoding
for shl. Caught by inspection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117820 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
|
| 905b8f76142b43cd33c36c554d359ee8740f51d5 |
|
30-Oct-2010 |
Chris Lattner <sabre@nondot.org> |
add a test for the ud2a alias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117803 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
|
| 529b1a43986265fb399eecd0dcbf9c409d049853 |
|
27-Oct-2010 |
Kevin Enderby <enderby@apple.com> |
Added the x86 instruction ud2b (2nd official undefined instruction).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117485 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
|
| e460890351ed36fa518960a417d85964c2b29eee |
|
27-Oct-2010 |
Kevin Enderby <enderby@apple.com> |
Yet another tweak to X86 instructions to add ud2a as an alias to ud2
(still to add ud2b).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117435 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
|
| 5a378076a44ef3f507b91aa8e7715fabaec42074 |
|
27-Oct-2010 |
Kevin Enderby <enderby@apple.com> |
Another tweak to X86 instructions to add the missing flex instruction (without
the wait prefix).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117434 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
|
| f4630ecc3f2b80440b2d9e59add56a3b422de684 |
|
27-Oct-2010 |
Kevin Enderby <enderby@apple.com> |
Tweaks to X86 instructions to allow the 'w' suffix in places it makes
sense, when the instruction takes the 16-bit ax register or m16 memory
location. These changes to llvm-mc matches what the darwin assembler
allows for these instructions. Done differently than in r117031 that
caused a valgrind error which was later reverted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117433 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
|
| 41e8cc73cf570754fffdc6963321c153a8010458 |
|
27-Oct-2010 |
Kevin Enderby <enderby@apple.com> |
Added some aliases to the fcomip and fucompi Intel instructions. So that llvm-mc
will accept versions that the darwin assembler allows. Forms ending in "pi" and
forms without all the operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117427 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
|
| 0966ec08610c02c8556105f2fff88a7e7247a549 |
|
22-Oct-2010 |
Andrew Trick <atrick@apple.com> |
Reverting r117031 to cleanup valgrind errors.
It doesn't look like anything is wrong with the checkin,
but the new test cases expose a mem bug in AsmParser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117087 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
|
| 0b9325c97d031ab0e9a240d69a2be11ec1559e37 |
|
21-Oct-2010 |
Kevin Enderby <enderby@apple.com> |
More tweaks to X86 instructions to allow the 'w' suffix in places it makes
sense, when the instruction takes the 16-bit ax register or m16 memory
location. These changes to llvm-mc matches what the darwin assembler allows
for these instructions. Also added the missing flex (without the wait prefix)
and ud2a as an alias to ud2 (still to add ud2b).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117031 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
|
| 87f4a1a4331e40cbba28e829561759d146273840 |
|
19-Oct-2010 |
Kevin Enderby <enderby@apple.com> |
Added a few tweaks to the Intel Descriptor-table support instructions to allow
word forms and suffixed versions to match the darwin assembler in 32-bit and
64-bit modes. This is again for use just with assembly source for llvm-mc .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116773 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
|
| 7aef62ff8c72506cc9b77333d25f4aa8aa9cf9fe |
|
18-Oct-2010 |
Kevin Enderby <enderby@apple.com> |
Added a handful of x86-32 instructions that were missing so that llvm-mc would
be more complete. These are only expected to be used by llvm-mc with assembly
source so there is no pattern, [], in the .td files. Most are being added to
X86InstrInfo.td as Chris suggested and only comments about register uses are
added. Suggestions welcome on the .td changes as I'm not sure on every detail
of the x86 records. More missing instructions will be coming.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116716 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
|
| 591d76ea5a10062316e18075eccd4c62d60b5a80 |
|
03-Oct-2010 |
Chris Lattner <sabre@nondot.org> |
the immediate field of pshufw is actually an 8-bit field, not a 8-bit field that is sign extended. This fixes PR8288
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115473 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
|
| d47691460770c886cf2fdafaf0f53e0cd101ccf1 |
|
02-Oct-2010 |
Chris Lattner <sabre@nondot.org> |
fix a regression introduced in r115243, in which the instruction
backing int_x86_ssse3_pshuf_w got removed. This caused PR8280.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115422 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
|
| 3286db670c689104c0df4f98fbb4a66f6e4d2db5 |
|
01-Oct-2010 |
Chris Lattner <sabre@nondot.org> |
move X86 subdir up a level
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115292 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/X86/x86-32.s
|