| 4cf2be408eeabd7ae8b0d3c3c81a6dc17e98e323 |
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17-Sep-2012 |
Tom Stellard <thomas.stellard@amd.com> |
r600g: Use LOOP_START_DX10 for loops
LOOP_START_DX10 ignores the LOOP_CONFIG* registers, so it is not limited
to 4096 iterations like the other LOOP_* instructions. Compute shaders
need to use this instruction, and since we aren't optimizing loops with
the LOOP_CONFIG* registers for pixel and vertex shaders, it seems like
we should just use it for everything.
Reviewed-by: Marek Olšák <maraeo@gmail.com>
(cherry picked from commit 810345492eca34c2ad12728b5491a4691cc62ec2)
Fixes a hang on the following piglit test on my rv770
./bin/ext_timer_query-time-elapsed -auto -fbo
/external/mesa3d/src/gallium/drivers/r600/eg_asm.c
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| 94a6a363792e8cb57a9f15778a3f3440d5b754ab |
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27-Feb-2012 |
Tom Stellard <thomas.stellard@amd.com> |
r600g: Add FC_NATIVE instruction
This is a pseudo instruction that enables the LLVM backend to encode
instructions and pass it through r600_bytecode_build()
Signed-off-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/gallium/drivers/r600/eg_asm.c
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| 330b6c85c961b32f704ce8ec7dbf8cb7fc0b80a8 |
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05-Mar-2012 |
Marek Olšák <maraeo@gmail.com> |
r600g: cleanup includes
/external/mesa3d/src/gallium/drivers/r600/eg_asm.c
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| d649bf51ec787021f7872e2a4c09fb2188c0891b |
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20-Jan-2012 |
Vadim Girlin <vadimgirlin@gmail.com> |
r600g: improve kcache line sets handling v2
Add support for multiple kcache banks (constant buffers).
Lock the required lines only.
Allow up to 4 kcache line sets in the alu clause by using ALU_EXTENDED on eg+.
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/eg_asm.c
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| 543b2331d7b45a29ccd3530daa2389e87e65d89b |
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08-Nov-2011 |
Marek Olšák <maraeo@gmail.com> |
r600g: implement transform feedback
r600: DONE.
r700: MOSTLY (done but locks up).
Evergreen: MOSTLY (done but doesn't work for an unknown reason).
The kernel support will come soon.
/external/mesa3d/src/gallium/drivers/r600/eg_asm.c
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| 4f7c21899ad449be2bc1157ce1d2d99296a34499 |
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14-Nov-2011 |
Marek Olšák <maraeo@gmail.com> |
r600g: fix the representation of control-flow instructions
We need something that looks like a compiler and not like some hacker
put some functions together. /rant
This is a band-aid for these two problems:
- The R600 and EG control-flow instructions appear in switch statements
next to each other, causing conflicts when adding new instructions.
- The ALU control-flow instructions are bitshifted by 3 (from CF_INST 26:29
to CF_INST 23:29, as is defined by r600 ISA) even for EG, where CF_INST
is 22:29.
To fix this mess, the 'inst' field is bitshifted to the left either by 22, 23,
or 26 (directly in the definitions), such that it can be just or'd when making
bytecode without any shifting. All switch statements have been divided into
two, one for R600 and the other for EG.
Of course, there is a better way to do this, but that is left for future
work.
Tested on RV730 and REDWOOD with no regressions.
v2: minor cleanup as per Alex's comment.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
/external/mesa3d/src/gallium/drivers/r600/eg_asm.c
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| 4a47662beaa2092447939db7880531fb706afedd |
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16-Aug-2011 |
Marek Olšák <maraeo@gmail.com> |
r600g: rename bc -> bytecode
It took me a while to figure out what it stands for.
/external/mesa3d/src/gallium/drivers/r600/eg_asm.c
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| 89dc31a28d8e5607989ec11cfd29310c1c97f6ac |
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09-Jul-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: Replace the CHIPREV_* defines with the chip_class enum.
Signed-off-by: Henri Verbeet <hverbeet@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/eg_asm.c
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| 7779f6d1dffde2c0501e44adc342e52803de08d4 |
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09-Mar-2011 |
Dave Airlie <airlied@redhat.com> |
r600g: add initial cayman acceleration support.
Cayman is the RadeonHD 69xx series of GPUs. This adds support for
3D acceleration to the r600g driver.
Major changes:
Some context registers moved around - mainly MSAA and clipping/guardband related.
GPR allocation is all dynamic
no vertex cache - all unified in texture cache.
5-wide to 4-wide shader engines (no scalar or trans slot)
- some changes to how instructions are placed into slots
- removal of END_OF_PROGRAM bit in favour of END flow control clause
- no vertex fetch clause - TC accepts vertex or texture
Signed-off-by: Dave Airlie <airlied@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/eg_asm.c
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| a2ef38368b638caba26418a68c157d52b6bcf797 |
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14-Mar-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: Move fetch shader register setup to r600_state.c / evergreen_state.c.
Signed-off-by: Henri Verbeet <hverbeet@gmail.com>
/external/mesa3d/src/gallium/drivers/r600/eg_asm.c
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| 96bbc627f369c0100b950f81531b1fe9ef586c34 |
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28-Feb-2011 |
Christian König <deathsimple@vodafone.de> |
r600g: implement instanced drawing support
/external/mesa3d/src/gallium/drivers/r600/eg_asm.c
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| 8ca3b140eb53fd8063337a5a2a54a35987d597bc |
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02-Feb-2011 |
Christian König <deathsimple@vodafone.de> |
r600g: use burst exports in shaders
Join multiple exports into just one instruction
instead of exporting each register separately.
/external/mesa3d/src/gallium/drivers/r600/eg_asm.c
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| 8813842121d46d1be476807c98b0ba0b771f0c91 |
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14-Dec-2010 |
Christian König <deathsimple@vodafone.de> |
r600g: optimize away CF_INST_POP
If last instruction is an CF_INST_ALU we don't need to emit an
additional CF_INST_POP for stack clean up after an IF ELSE ENDIF.
/external/mesa3d/src/gallium/drivers/r600/eg_asm.c
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| 8273921b7a41251f3f5a87df995913cb291902ca |
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07-Jan-2011 |
Henri Verbeet <hverbeet@gmail.com> |
r600g: Store kcache settings as an array.
/external/mesa3d/src/gallium/drivers/r600/eg_asm.c
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| fa86fc564aea4e40c89f6fc889e6a5bf817634b3 |
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04-Dec-2010 |
Jerome Glisse <jglisse@redhat.com> |
r600g: build fetch shader from vertex elements
Vertex elements change are less frequent than draw call, those to
avoid rebuilding fetch shader to often build the fetch shader along
vertex elements. This also allow to move vertex buffer setup out
of draw path and make update to it less frequent.
Shader update can still be improved to only update SPI regs (based
on some rasterizer state like flat shading or point sprite ...).
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/eg_asm.c
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| f609b2ab0342d77a8beca9efb5fbc5b66ff98295 |
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18-Nov-2010 |
Jerome Glisse <jglisse@redhat.com> |
r600g: add fetch shader capabilities
Use fetch shader instead of having fetch instruction in the vertex
shader. Allow to restrict shader update to a smaller part when
vertex buffer input layout changes.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/eg_asm.c
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| d1acb920163ab0f39ff2fc72b85fc7bf16c37262 |
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25-Oct-2010 |
Dave Airlie <airlied@redhat.com> |
r600g: add assembler support for all the kcache fields.
/external/mesa3d/src/gallium/drivers/r600/eg_asm.c
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| 29b491bd033dd97e5afa3ca0058c50f28c01f39d |
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01-Oct-2010 |
Jerome Glisse <jglisse@redhat.com> |
r600g: indentation fixes
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/eg_asm.c
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| 9c284b5cae916a083d17d1039d2f2da128b47882 |
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29-Sep-2010 |
Jerome Glisse <jglisse@redhat.com> |
r600g: delete old path
Lot of clean can now happen.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/eg_asm.c
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| e0b6df4fcce0964ea7930efeb40cb487b4c53337 |
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15-Sep-2010 |
John Doe <glisse@localhost.localdomain> |
r600g: misc cleanup
Avoid using r600_screen structure to get ptr to radeon
winsys structure.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
/external/mesa3d/src/gallium/drivers/r600/eg_asm.c
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| 50526e094f4c66957c7f74c190c35903bc82fb62 |
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03-Sep-2010 |
Dave Airlie <airlied@redhat.com> |
r600g: add initial evergreen support
adds shader opcodes + assembler support (except ARL)
uses constant buffers
add interp instructions in fragment shader
adds all evergreen hw states
adds evergreen pm4 support.
this runs gears for me on my evergreen
/external/mesa3d/src/gallium/drivers/r600/eg_asm.c
|