| d02343e5016a5795451af3e0315b658b39463a30 |
|
04-Jan-2013 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Use Haswell's sample_d_c for textureGrad with shadow samplers.
The new hardware actually just supports this now.
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 899017fc54c40c969b5239b33f3a17b311878b0d)
/external/mesa3d/src/mesa/drivers/dri/i965/brw_shader.cpp
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| 77d675926a5a5b6cfafe11d1b692e0ba93fdac85 |
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26-Aug-2012 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Make VS programs obey the shader_precompile driconf option.
Now that it's on by default, we may as well make it obey the flag,
for consistency's sake if nothing else.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_shader.cpp
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| d1447f5bc92e6bcbc9180e606cdfef9540678918 |
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21-Aug-2012 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Fix brw_link_shader to return false rather than NULL.
Fixes brw_shader.cpp:101:9: warning: converting to non-pointer type
'GLboolean {aka unsigned char}' from NULL [-Wconversion-null]
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-with-great-enthusiasm-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_shader.cpp
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| 90de96ff0d6d54ba0f9a337a6a107acf4134682d |
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21-Jun-2012 |
Eric Anholt <eric@anholt.net> |
i965/fs: Add support for loading uniform buffer variables as pull constants.
Variable array indexing isn't finished, because the lowering pass
turns it all into conditional moves of constant index accesses so I
can't test it.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_shader.cpp
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| 0f1f2ff8db8c19be27b9f51f07134091e109e4b2 |
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19-Jul-2012 |
Paul Berry <stereotype441@gmail.com> |
mesa: Set gl_fragment_program::UsesKill in do_set_program_inouts.
Previously, the code for setting this flag for GLSL programs was
duplicated in three places: brw_link_shader(), glsl_to_tgsi_visitor,
and ir_to_mesa_visitor. In addition to the unnecessary duplication,
there was a performance problem on i965: brw_link_shader() set the
flag before doing its final round of optimizations, which meant that
if the optimizations managed to eliminate all the discard operations,
the flag would still be set, resulting (at least in theory) in slower
performance.
This patch consolidates all of the code that sets UsesKill for GLSL
programs into do_set_program_inouts(), which already is doing a
similar job for UsesDFdy, and which occurs after i965's final round of
optimizations.
Non-GLSL programs (ARB programs and the state tracker's glBitmap
program) are unaffected.
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_shader.cpp
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| b0c8d3be73ea777e1fd5870c344afb1d31921411 |
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09-Jul-2012 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Add a lowering pass to convert TXD to TXL by computing the LOD.
Intel hardware doesn't natively support textureGrad with shadow
comparisons. So we need to generate code to handle it somehow.
Based on the equations of page 205 of the OpenGL 3.0 specification,
it's possible to compute the LOD value that would be selected given the
gradient values. Then, we can simply convert the TXD to a TXL.
Currently, this passes 34/46 of oglconform's shadow-grad subtests;
four cubemap tests are regressed. We should investigate this in the
future.
v2: Apply abs() to the scalar case (thanks to Eric).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_shader.cpp
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| b2be4869624443cd9769bd696b11dd587494b62a |
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12-Jan-2012 |
Eric Anholt <eric@anholt.net> |
i965: Fix refcount leak of the gl_program structure.
Fixes a leak of almost 200kb on a minimal shader_runner program
(algebraic-add-add-1).
NOTE: This is a candidate for the 8.0 branch.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_shader.cpp
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| 1c177452005a0366db01629d875da553f7949ddd |
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07-Jan-2012 |
Ian Romanick <ian.d.romanick@intel.com> |
i965: Don't use _mesa_ir_link_shader to do our dirty work
Instead, do the uniform setting and input / output mapping directly in
brw_link_shader. Hurray for not generating Mesa IR! However, once
the i965 driver stops calling _mesa_ir_link_shader, UsesClipDistance
and UsesKill are no longer set.
Ideally gen6_upload_vs_push_constants should use the
gl_shader_program, but I don't see a way to propagate the information
there. The other alternative, since this is the only usage, is to
move gl_vertex_program::UsesClipDistance to brw_vertex_program.
The compile (and precompile) stages use UsesKill to determine the
cache key for the shader. This is then used to determine whether or
not to compile the shader. Calculating this data during compilation
is too late.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_shader.cpp
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| 475d70d6ef5feb94efab3923e5607e625f2aee67 |
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26-Oct-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
i965/fs: Factor out texture offset bitfield computation.
We'll want to reuse this for the VS, and it's complex enough that I'd
rather not cut and paste it.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_shader.cpp
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| c6abde211fa875f90e59e3709720cfe394669069 |
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23-Nov-2011 |
Eric Anholt <eric@anholt.net> |
i965: Don't perform the precompile on fragment shaders by default.
It is useful to have this option for shader-db, and it was also good
at the time where we were rejecting shaders due to various internal
limits we hadn't supported yet. However, at this point the precompile
step takes extra time (since not all NOS is known at link time) and
spews misleading debug in the common case of debugging a real app.
This is left in place for VS, where we still have a couple of codegen
failure paths that result in link failure through precompile. Those
need to be fixed.
shader-db can still get at the debug info it wants using
"shader_precompile=true" driconf option. Long term, we can probably
build a good-enough app for shader-db to trigger real codegen.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_shader.cpp
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| e19dfc75b67e263437bd08b161c15b34582ccb2f |
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09-Nov-2011 |
Eric Anholt <eric@anholt.net> |
i965: Make brw_type_for_base_type return the element type for arrays.
Previously, brw_type_for_base_type returned UD for array variables,
similar to structures. For structures, each field may have a different
type, so every field access must explicitly override the register's type
with that field's type. We chose to return UD in this case since it was
the least common, so errors would be more obvious.
For arrays, it makes far more sense to return the type corresponding to
an element of the array. This allows normal array access to work
without the hassle of explicitly overriding the register's type.
This should obsolete a bunch of type overrides throughout the code.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_shader.cpp
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| 143d20c16a33e2f08e834b28c23dbea772591ef9 |
|
25-Oct-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
i965: Move _mesa_ir_link_shader call before device-specific linking
_mesa_ir_link_shader needs to be called before cloning the IR tree so
that the var->location field for uniforms is set.
WARNING: This change breaks several integer division related piglit
tests. The tests break because _mesa_ir_link_shader lowers integer
division to an RCP followed by a MUL. The fix is to factor out more
of the code from ir_to_mesa so that _mesa_ir_link_shader does not need
to be called at all by the i965 driver. This will be the subject of
several follow-on patches.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Tom Stellard <thomas.stellard@amd.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_shader.cpp
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| 1d5d67f8adac9f94715de9804adb536d9a7ec5ee |
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21-Oct-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
glsl: Add uniform_locations_assigned parameter to do_dead_code opt pass
Setting this flag prevents declarations of uniforms from being removed
from the IR. Since the IR is directly used by several API functions
that query uniforms in shaders, uniform declarations cannot be removed
after the locations have been set. However, it should still be safe
to reorder the declarations (this is not tested).
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41980
Tested-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Bryan Cain <bryancain3@gmail.com>
Cc: Vinson Lee <vlee@vmware.com>
Cc: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_shader.cpp
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| 2e5a1a254ed81b1d3efa6064f48183eefac784d0 |
|
07-Oct-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
intel: Convert from GLboolean to 'bool' from stdbool.h.
I initially produced the patch using this bash command:
for file in {intel,i915,i965}/*.{c,cpp,h}; do [ ! -h $file ] && sed -i
's/GLboolean/bool/g' $file && sed -i 's/GL_TRUE/true/g' $file && sed -i
's/GL_FALSE/false/g' $file; done
Then I manually added #include <stdbool.h> to fix compilation errors,
and converted a few functions back to GLboolean that were used in core
Mesa's function pointer table to avoid "incompatible pointer" warnings.
Finally, I cleaned up some whitespace issues introduced by the change.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Chad Versace <chad@chad-versace.us>
Acked-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_shader.cpp
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| 1165b64f561a7bdd3f603d9e30a2340774ba31ee |
|
29-Sep-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Stop lowering integer division to multiply and reciprocal.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_shader.cpp
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| ff8f272b0d02b41a0ce34ab6af7119b9e06f4961 |
|
29-Sep-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
i965/fs: Implement integer quotient and remainder math operations.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_shader.cpp
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| 478034f34a59969103237eb78bc82f9e70fe81c2 |
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28-Aug-2011 |
Bryan Cain <bryancain3@gmail.com> |
glsl: Use a separate div_to_mul_rcp lowering flag for integers.
Using multiply and reciprocal for integer division involves potentially
lossy floating point conversions. This is okay for older GPUs that
represent integers as floating point, but undesirable for GPUs with
native integer division instructions.
TGSI, for example, has UDIV/IDIV instructions for integer division,
so it makes sense to handle this directly. Likewise for i965.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Bryan Cain <bryancain3@gmail.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_shader.cpp
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| ddca4592a7fa08cc294403d221a5f329ee4991e9 |
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22-Aug-2011 |
Eric Anholt <eric@anholt.net> |
i965/vs: Don't lower uniform array indexing.
This avoids the massive conditional move array access, and brings code
generation quality for the new VS backend into the realm of efficiency
of the old backend (roughly 20% more instructions generated than
before across shader-db, instead of assertion failing for generating
over 10,000 instructions on many shaders!).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_shader.cpp
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| 2f0edc60f4bd2ae5999a6afa656e3bb3f181bf0f |
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26-Aug-2011 |
Chad Versace <chad@chad-versace.us> |
i965: Fix Android build by removing relative includes
Replace each occurence of
#include "../glsl/*.h"
with
#include "glsl/*.h"
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_shader.cpp
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| 7fbe7fe13359d3f349664410ec73d7bd48824ed6 |
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11-Aug-2011 |
Eric Anholt <eric@anholt.net> |
i965/vs: Run the shader backend at link time and return compile failures.
Link failure is something that shouldn't happen, but we sometimes want
it during development. The precompile also allows analysis of shader
codegen with shader-db.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_shader.cpp
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| 54fa706d6f06955221cb6b452b5b170bfaaceef4 |
|
07-Aug-2011 |
Eric Anholt <eric@anholt.net> |
i965/vs: Enable variable array indexing in the VS.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_shader.cpp
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| af3c9803d818fd33139f1247a387d64b967b8992 |
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02-May-2011 |
Eric Anholt <eric@anholt.net> |
i965: Start adding the VS visitor and codegen.
The low-level IR is a mashup of brw_fs.cpp and ir_to_mesa.cpp. It's
currently controlled by the INTEL_NEW_VS=1 environment variable, and
only tested for the trivial "gl_Position = gl_Vertex;" shader so far.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_shader.cpp
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| c1f00731fd48dde68b67f157c27eb20982e82193 |
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04-May-2011 |
Eric Anholt <eric@anholt.net> |
i965: Generate driver-specific IR for non-fragment shaders as well.
This will be used by the new vertex shader backend. The scalarizing
passes are skipped for non-fragment, since vertex and geometry threads
are based on vec4s.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_shader.cpp
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| 8752764076e5b3f052a57e0134424a37bf2e9164 |
|
17-May-2011 |
Eric Anholt <eric@anholt.net> |
i965/fs: Do a FS compile up front at link time to produce link errors.
At glLinkShaders time, a fail() call in FS compile in 8-wide (the one
that's required to succeed, though we may relax that at some point for
pre-Ironlake performance) will now report out as a link error.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_shader.cpp
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| b7b700aeb0eab2cae26a01d9db42feea969333c7 |
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26-May-2011 |
Eric Anholt <eric@anholt.net> |
i965: Move a couple of GLSL IR -> BRW helper functions to brw_shader.cpp.
These will be used by the VS backend as well.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_shader.cpp
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| 14b86f3c9131c1b26b01e07679cc899df0885b23 |
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26-May-2011 |
Eric Anholt <eric@anholt.net> |
i965: Move non-FS-specific shader support to brw_shader.cpp.
These only existed in brw_fs.cpp because it was the only .cpp file in
the area when I wrote them.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_shader.cpp
|