| 3913cd19b82802449dad2008ff4cfc1d546c05a6 |
|
09-Oct-2012 |
Quentin Glidic <sardemff7@sardemff7.net> |
intel: Add missing #include <time.h>
Commit 006c1a3c652803e2ff8d5f7ea55c9cb5d8353279 introduced a call to
clock_gettime, but failed to include <time.h>, breaking the build in
some cases.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 7cb8764ca39cb7f325d6da10a8b11bf24adf2ae0)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| a87b0110b93597c6df5d84e720f685816d01ed40 |
|
28-Sep-2012 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Don't call intelDestroyContext if there is no context to destroy
Some error paths in the device-specific context creation functions can exit
before the deintel_context structure is allocated.
NOTE: This is a candidate for the 9.0 branch.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=53618
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54301
(cherry picked from commit 22897c74979aa02facdd5cd729db8dadf86924f5)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 96fd94ba9421c7c3072988f999ee869534f2bc2a |
|
30-Aug-2012 |
Paul Berry <stereotype441@gmail.com> |
intel: Add map_stencil_as_y_tiled to intel_region_get_tile_masks.
When the blorp engine is performing a blit from one stencil buffer to
another, it sets up the surface state for these buffers as Y-tiled, so
it needs to be able to force intel_region_get_tile_masks() to return
the appropriate masks for a Y-tiled region.
Acked-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 50dec7fc2d5ba813aaa822596d124098a22db301)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 00978098794f723230a33cab1c1152686f1c4fa5 |
|
31-Aug-2012 |
Jakob Bornecrantz <jakob@vmware.com> |
dri: Rework planar image interface
As discussed with Kristian on #wayland. Pushes the decision of components into
the dri driver giving it greater freedom to allow t to implement YUV samplers
in hardware, and which mode to use.
This interface will also allow drivers like SVGA to implement YUV surfaces
without the need to sub-allocate and instead send 3 seperate buffers for each
channel, currently not implemented.
I have tested these changes on Gallium Svga. Scott tested them on both intel
and Gallium Radeon. Kristan and Pekka tested them on intel.
v2: Fix typo in dri2_from_planar.
v3: Merge in intel changes.
(cherry picked from commit 6a7dea93fa70d670a5954e47a47075a2703209d4)
Tested-by: Scott Moreau <oreaus@gmail.com>
Tested-by: Pekka Paalanen <ppaalanen@gmail.com>
Tested-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Signed-off-by: Jakob Bornecrantz <jakob@vmware.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 91473485fcf3e2cef465784ae5581787a2a8a3b3 |
|
07-Aug-2012 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Clean up bits of cruft in intelCreateContext
This and the previous three commits should probably be squashed together...
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| bf8644e64daa4e1d59d1e399355b349406438d7a |
|
17-Aug-2012 |
Ian Romanick <ian.d.romanick@intel.com> |
i965: Set context flags
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 9ef710575b914ddfc8e9a162d98ad554c1c217f7 |
|
26-Aug-2012 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Reenable the fragment shader precompile.
Precompiling the shader at link time often allows us to avoid compiling
it at the first use. This moves the expensive compilation and
optimization process to game or level load time, rather than at draw
time, where we really can't avoid any cycles and don't want to risk
stalling the GPU.
The downside is that we have to guess the non-orthagonal state the
program will have set when it draws with the shader. Previously, we
guessed wrong for nearly every shader, so it wasn't useful. With the
recent SamplerUnits rework and this series, we've either eliminated
state or made smarter guesses, and usually get it right now.
In the L4D2 time demo, I now have 39 fragment shader recompiles and no
vertex shader recompiles. Before this series and the SamplerUnits
rework, I had 206 fragment shader recompiles and 192 vertex shader
recompiles.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 6bb71b8cbe6b17a5d59e369631502e642804406e |
|
15-Aug-2012 |
Jakob Bornecrantz <jakob@vmware.com> |
dri: Remove image write function
Since its not used by anything anymore and no release has gone out
where it was being used.
Tested-by: Scott Moreau <oreaus@gmail.com>
Signed-off-by: Jakob Bornecrantz <jakob@vmware.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 38b748ce29a6415558bbe4886589134e3db047c8 |
|
09-Aug-2012 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Refactor intel_downsample_for_dri2_flush
Move it from intel_screen.c to intel_context.c. Redeclare as non-static.
A future commit will use it in multiple files.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| d60692601388b5448fb0ed4eb894103293b2f074 |
|
07-Aug-2012 |
Ian Romanick <ian.d.romanick@intel.com> |
i965: Validate API and version in brwCreateContext
v2: Use base-10 for versions like gl_context::Version. Suggested by Ken.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| db273724c9484d513f5caa34729475d2873d9f7b |
|
07-Aug-2012 |
Ian Romanick <ian.d.romanick@intel.com> |
i915: Validate API and version in i915CreateContext
v2: Use base-10 for versions like gl_context::Version. Suggested by Ken.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| a81e4b3e9272f70ab9074f1c133dda94c58daeff |
|
07-Aug-2012 |
Ian Romanick <ian.d.romanick@intel.com> |
i830: Validate API and version before calling i830CreateContext
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 2b636243265f0f09b7fd8d42046119222a63cad4 |
|
07-Aug-2012 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: In the i915 driver, the chipset cannot be i965
In the i965 dirver, the chipset must be i965.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 70f47505a2e5d4cf949b7c2650f3d9f6559bacb3 |
|
07-Aug-2012 |
Ian Romanick <ian.d.romanick@intel.com> |
dri: Pass API_OPENGL_CORE through to the drivers
This forces the drivers to do at least some validation of context API
and version before creating the context. In r100 and r200 drivers, this
means that they don't do any post-hoc validation.
v2: Actually reject compatibility profile 3.2+ contexts. Thanks Ken.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 006c1a3c652803e2ff8d5f7ea55c9cb5d8353279 |
|
07-Aug-2012 |
Eric Anholt <eric@anholt.net> |
i965: Add perf debug for stalls during shader compiles.
v2: fix bad comment from before I gave up and decided to just use doubles.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 9c1b41879aab2ff7386c547a2ccce7686c018cf5 |
|
26-Jul-2012 |
Eric Anholt <eric@anholt.net> |
mesa: Replace VersionMajor/VersionMinor with a Version field.
As we get into supporting GL 3.x core, we come across more and more features
of the API that depend on the version number as opposed to just the extension
list. This will let us more sanely do version checks than "(VersionMajor == 3
&& VersionMinor >= 2) || VersionMajor >= 4".
v2: Fix a bad <= 30 check.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 3aaeb3e5e76b7b468e2eb2a26f30d68d19d3c854 |
|
07-Aug-2012 |
Eric Anholt <eric@anholt.net> |
intel: Fix compiler warnings from winsys msaa.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| e943e5c291c5f4c017f9f5a483f1940313333fc3 |
|
03-Aug-2012 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Advertise multisample DRI2 configs on gen >= 6
This turns on window system MSAA.
This patch changes the id of many GLX visuals and configs, but that
couldn't be prevented. I attempted to preserve the id's of extant configs
by appending the multisample configs to the end of the extant ones. But
somewhere, perhaps in the X server, the configs are reordered with
multisample configs interspersed among the singlesample ones.
Test results:
Tested with xonotic and `glxgears -samples 1` on Ivybridge.
No piglit regressions on Ivybridge.
On Sandybridge, passes 68/70 of oglconform's
winsys multisample tests. The two failing tests are:
multisample(advanced.pixelmap.depth)
multisample(advanced.pixelmap.depthCopyPixels)
These tests hang the gpu (on kernel 3.4.6) due to
a glDrawPixels/glReadPixels pair on an MSAA depth buffer. I don't expect
realworld apps to do that, so I'm not too concerned about the hang.
On Ivybridge, passes 69/70. The failing case is
multisample(advanced.line.changeWidth).
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 8b5d68dd28a78c2250bfc4a7fa62cd9e5cdd756e |
|
02-Aug-2012 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Clarify intel_screen_make_configs
This function felt sloppy, so this patch cleans it up a little bit.
- Rename `color` to `i`. It is not a color value, only an iterator int.
- Move `depth_bits[0] = 0` into the non-accum loop because that is where
it used. The accum loop later overwrites depth_bits[0].
- Rename `depth_factor` to `num_depth_stencil_bits`.
- Redefine `msaa_samples_array` as static const because it is never
modified. Rename to `singlesample_samples`.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| a4bf68ca50da0ce291a464aec9b03a469ab2561a |
|
02-Aug-2012 |
Chad Versace <chad.versace@linux.intel.com> |
dri: Simplify use of driConcatConfigs
If either argument to driConcatConfigs(a, b) is null or the empty list,
then simply return the other argument as the resultant list.
All callers were accomplishing that same behavior anyway. And each caller
accopmplished it with the same pattern. So this patch moves that external
pattern into the function.
Reviewed-by: <eric@anholt.net>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| b2d428cb8d20e003b65769c7757a137406c671e6 |
|
12-Jul-2012 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Refactor creation of DRI2 configs
DRI2 configs were constructed in intelInitScreen2. That function already
does too much, so move verbatim the code for creating configs to a new
function, intel_screen_make_configs.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 61fd6847827048ce9b01b1d164111472ad8bf593 |
|
12-Jul-2012 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Downsample on DRI2 flush
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| e2f2376e884225705e2369caee4a8c4e90e938f3 |
|
12-Jul-2012 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Set num samples for winsys renderbuffers
Add a new param, num_samples, to intel_create_renderbuffer and
intel_create_private_renderbuffer.
No multisample GL config is yet advertised, so the value of num_samples is
currently 0. For server-owned winsys buffers, gl_renderbuffer::NumSamples
is not yet used.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com> (v1)
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 8c94f6bbd80908fd2cae8e27fe78c429e54a78b8 |
|
10-Jul-2012 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Use consistent pattern in intelCreateBuffer
The 16-bit depth case did not follow the function's prevalent pattern.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 2b4fbc4d7d3578642ca57b5e45094e66e03626fc |
|
10-Jul-2012 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Decrease nesting level in intelCreateBuffer
Nearly the whole function body was contained in the 'else' branch. The
'if' branch did one thing: return early with an error. Clean things up by
moving all the code out of the 'else' branch. Decreases max nesting level
from 4 to 3.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 83fa0842ca0772e9a3493bd7a66f69c458a1739b |
|
10-Jul-2012 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Remove dead code in intelAllocateBuffer
After commit "intel: Convert to using private depth/stencil buffers", we
request from DRI2GetBuffersWithFormat only the front left and back left
buffers. We no longer request depth and stencil buffers.
Assert that in intelAllocateBuffer and remove the related dead code.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 881bb4ac7285c462079844072fc1d0b26e340b12 |
|
17-Jul-2012 |
Jordan Justen <jordan.l.justen@intel.com> |
intel: move error on create context to proper path
The error was being set on the non-error path, rather
than the error path.
NOTE: This is a candidate for the 8.0 branch.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 040894391a2cf85035c6ad85f3f85c6efb23324b |
|
18-Jul-2012 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Add a driconf option to disable GL_ARB_blend_func_extended.
Unigine Heaven (at least) has a bug where it incorrectly uses the
GL_ARB_blend_func_extended extension.
Dual source blending allows two color outputs per render target;
individual shader outputs can be assigned to be either the first or
second blending input by setting the 'index' via one of two methods:
- An API call: glBindFragDataLocationIndexed()
- The GLSL 'layout' qualifier provided by GL_ARB_explicit_attrib_location
Both of these only work on user defined fragment shader outputs; it's an
error to use either on built-in outputs like gl_FragData.
Unigine uses gl_FragData and gl_FragColor exclusively, and doesn't even
attempt to use either method to set index == 1. However, it does set
the blending function to SRC1 enums, which requires a fragment shader
output with index == 1 or else rendering is undefined.
In other words, enabling ARB_blend_func_extended causes Unigine to
render incorrectly, resulting in an apparent regression, even though our
driver code (as far as I can tell) is perfectly fine.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=50291
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 1b4374d364f877d1b7d01e1231adeee2e0f63a4d |
|
04-Jul-2012 |
Eric Anholt <eric@anholt.net> |
intel: Replace the non-getBuffersWithFormat compat path with an error message.
It's been broken (using NULL getBuffersWithFormat() instead of
getBuffers()) due to a copy and paste error for a year now.
GetBuffersWithFormat has been around since 2009, so I don't feel any
guilt in not supporting it.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| bce58e155db7202a98642c10e6132dee4e08162b |
|
04-Jul-2012 |
Eric Anholt <eric@anholt.net> |
intel: Convert to using private depth/stencil buffers (v2)
This means that GLX buffer sharing of these no longer works. On the
other hand, just *look* at this code reduction.
v2:
- [chad] Fix intelCreateBuffer for gen < 6. When the branch for
!screen->hw_has_separate_stencil was taken,
intel_create_private_renderbuffer was incorrectly not used.
- [chad] Remove all code in intel_process_dri2_buffer for processing
depth, stencil, and hiz buffers. That code is now dead.
CC: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 44f066b9ffb7749e872c9cc44ab4d6e2973c2372 |
|
13-Jul-2012 |
Kristian Høgsberg <krh@bitplanet.net> |
gbm: Add new gbm_bo_import entry point
This generalizes and replaces gbm_bo_create_for_egl_image. gbm_bo_import
will create a gbm_bo from either an EGLImage or a struct wl_buffer.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 636646a481ef6ce29e74e4604125a42def3ed1e5 |
|
16-Jul-2012 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Don't call _mesa_get_format_bytes for MESA_FORMAT_NONE
When we don't intend to texture from or render to a __DRIimage we
use __DRI_IMAGE_FORMAT_NONE. In that case, we just create the __DRIimage
to reference the underlying buffer, and will create usable __DRIimages
from it using createSubImage later.
If we try to use _mesa_get_format_bytes() on MESA_FORMAT_NONE in
a debug build, we hit an assertion, so let's not do that.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 95bc0527e9f81c62cbfe02dace94e73d9950d04d |
|
05-Jul-2012 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Implement __DRIimage::createSubImage and bump supported version to 5
We use the new miptree offset to pick out the sub-image when we bind
the EGLImage to a texture.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 44a2b57f93ab68f873eab543f1ecb9dc7f230a7e |
|
05-Jul-2012 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Add support for new __DRIimage formats
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 1bb15c0a089cb268960d164d354ee6d942b4238f |
|
05-Jul-2012 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Share common __DRIimage allocation code
We have the same switch and allocation code in two places.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 454fc07ddefe2b750d78c94e8d52a11a8741c42f |
|
05-Jul-2012 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Just look up image->internal_format using _mesa_get_format_base_format
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| e408c17767c82c3bbd32d0386d5d9141c1fb20dc |
|
05-Jul-2012 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Remove unused __DRIimage::data_type field
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 4fddb2ba21add1c1968330e5224ecead59da3995 |
|
02-May-2012 |
Kristian Høgsberg <krh@bitplanet.net> |
gbm: Add gbm_bo_write entry point
This new gbm entry point allows writing data into a gbm bo. The bo has
to be created with the GBM_BO_USE_WRITE flag, and it's only required to
work for GBM_BO_USE_CURSOR_64X64 bos.
The gbm API is designed to be the glue layer between EGL and KMS, but there
was never a mechanism initialize a buffer suitable for use with KMS
hw cursors. The hw cursor bo is typically not compatible with anything EGL
can render to, and thus there's no way to get data into such a bo.
gbm_bo_write() fills that gap while staying out of the efficient
cpu->gpu pixel transfer business.
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| fd0082c47ecf1028bbb9e1e0dbc20173a3174772 |
|
24-Apr-2012 |
Sean V Kelley <sean.v.kelley@linux.intel.com> |
i965: Support Android RGBX8888 format for EGL generated images
Enabled MESA_FORMAT_RGBX8888_REV for RGBX. Android software
requires RGBX8888 format to be supported for software rendering.
That requires EGL to be capable of generating images from this
format.
Signed-off-by: Sean V Kelley <sean.v.kelley@linux.intel.com>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 249817e92839d9ecdd78360eb3a856724df504c4 |
|
29-Apr-2012 |
Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> |
intel: set dri_format field for all images
Only images created with intel_create_image() had the field properly
set. Set it also on intel_dup_image(), intel_create_image_from_name()
and intel_create_image_from_renderbuffer().
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| fc7d224e295c4cb641238c37612409b1174cea12 |
|
26-Apr-2012 |
Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> |
intel: properly return the image format on intel_query_image
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 249fc7056104113633215106ac085b505d8dc161 |
|
21-Mar-2012 |
Eric Anholt <eric@anholt.net> |
i965: When the kernel lacks the LLC check, assume it's present on gen >= 6.
The param wasn't added until drm-intel-next for 3.4, so we were
missing our various LLC fast-paths.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| e3df28337b6b45f5b3444a9d6d4e1f6988d2de1b |
|
21-Mar-2012 |
Eric Anholt <eric@anholt.net> |
intel: Drop backwards compat code for not having libdrm with the LLC check.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| a27c7d80afc3160a0face4b8781bf921229bc3cc |
|
06-Apr-2012 |
Paul Berry <stereotype441@gmail.com> |
i965: Stop lying about cpp and height of a stencil buffer.
When using a separate stencil buffer, i965 requires that the pitch of
the buffer (in the 3DSTATE_STENCIL_BUFFER command) be specified as 2x
the actual pitch.
Previously this was accomplished by doubling the "cpp" and "pitch"
values stored in the intel_region data structure, and halving the
height. However, this was confusing, and it led to a subtle (but
benign) bug: since a stencil buffer is W-tiled, its true height must
be aligned to a multiple of 64; we were accidentally aligning its faux
height to a multiple of 64, causing memory to be wasted.
Note that for window system stencil buffers, the DDX also doubles the
cpp and pitch values. To facilitate fixing this DDX server bug in the
future, we fix the cpp and pitch values we receive from the X server
only if cpp has the "incorrect" value of 2.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
v2: Clarify comments about the DDX.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 252d3118dd40e9e3c577702b4c65a2d6cfd343b6 |
|
30-Mar-2012 |
Kenneth Graunke <kenneth@whitecape.org> |
i965/aub: Dump a final bitmap from DestroyContext.
Certain applications don't call SwapBuffers before exiting. Yet, we'd
really like to see a bitmap containing the final rendered image even if
they choose never to present it.
In particular, Piglit tests (at least with -auto -fbo) fall into this
category. Many of them failed to dump any images at all.
Dumping one final image at context destruction time seems to work.
We may wish to pursue a more elegant solution later.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 2222aa06e16dbfe4c29e05a1189bce80680aba19 |
|
10-Mar-2012 |
Eric Anholt <eric@anholt.net> |
intel: Handle devid overrides using libdrm.
Reviewed-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 0247d89183e26fbd07e4176ff6f8d1b4989e24ab |
|
07-Mar-2012 |
Eric Anholt <eric@anholt.net> |
intel: Ask libdrm to dump an AUB file if INTEL_DEBUG=aub.
It also asks for BMPs in the aub file at SwapBuffers time.
Reviewed-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| d09fce51f0cf91c9c07f69063fe2180cc319d8df |
|
06-Mar-2012 |
Eric Anholt <eric@anholt.net> |
i965: Change the hiz-override env var to a driconf option.
The force-enable option is dropped, now that the hardware we were
concerned about has HiZ on by default. Now, instead of doing
INTEL_HIZ=0 to test disabling hiz, you can set hiz=false.
v2: Disable separate stencil on gen6 when HIZ is turned off.
(previously, this had to be done manually in addition).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| f172eae8b23d0612865895c52af745021ae20a4c |
|
02-Mar-2012 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
i965: fixup W-tile offset computation to take swizzling into account
There's even a comment in the code containing the right swizzling
computations!
Previously this has not been noticed because we need to manually
enabled swizzling on snb/ivb (kernel 3.4 will do that) and we
don't use the separate stencil on ilk (where the bios enables
swizzling). This fixes
piglit ./bin/fbo-stencil readpixels GL_DEPTH32F_STENCIL8 -auto
on recent drm-intel-next kernels.
Also remove the comment about ivb, it's stale now.
Swizzling detection is done by allocating a temporary x-tiled
buffer object. Unfortunately kernels before v3.2 lie on snb/ivb
because they claim that swizzling is enable, but it isn't. The
kernel commit that fixes this for backport to pre-v3.2 is
commit acc83eb5a1e0ae7dbbf89ca2a1a943ade224bb84
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Mon Sep 12 20:49:16 2011 +0200
drm/i915: fix swizzling on gen6+
But if the kernel doesn't lie, this now works on swizzling and
not swizzling machines.
NOTE: This is a candidate for the 8.0 branch.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 0beed7f072e2a8127c7c02dfc39fb37053d96b22 |
|
22-Feb-2012 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
intel: bump DRI_IMAGE extension version to 3
To indicate support for the format query.
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 8de5c355fa2bf0f30df2c7cf39aee01e793284bf |
|
21-Feb-2012 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
gbm: track buffer format through DRI drivers
GBM needs the buffer format in order to communicate with DRM and clients
for things like scanout.
So track the DRI format requested in the various back ends and use it to
return the DRI format back to GBM when requested. GBM will then map
this into the GBM surface type (which is in turn based on the DRM fb
format list).
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| f33d100fa71cecfb163dd91cd56b9a2788a43c22 |
|
16-Feb-2012 |
Eric Anholt <eric@anholt.net> |
intel: Silence valgrind warning for getparam ioctl argument.
It was concerned that the 4 pad bytes on LP64 were uninitialized.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 7def293204977c41ea35198af147f743a31b1889 |
|
01-Feb-2012 |
Eugeni Dodonov <eugeni.dodonov@intel.com> |
intel: verify if hardware has LLC support
Rely on libdrm HAS_LLC parameter to verify if hardware supports it. In
case the libdrm version does not supports this check, fallback to older
way of detecting it which assumed that GPUs newer than GEN6 have it.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 642247883fb9e6dce9bad724f7f6503321e0ef6f |
|
25-Jan-2012 |
Eric Anholt <eric@anholt.net> |
i965: Add a driconf option to force GLSL extension behavior to "warn".
This can be used to work around broken application behavior, like in
Unigine where it attempts to use texture arrays without declaring
either "#extension GL_EXT_texture_array : enable" or "#version 130".
NOTE: This is a candidate for the 8.0 branch.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 9f8ed9d66298e2dc5dff508e3ea723469fe06d93 |
|
16-Jan-2012 |
Brian Paul <brianp@vmware.com> |
intel: derive intel_renderbuffer from swrast_renderbuffer
Drivers that rely on swrast need to do this, as with swrast_texture_image.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| f9874feef4d8952df5054bd8e8f4e0deda4ef44f |
|
16-Jan-2012 |
Brian Paul <brianp@vmware.com> |
mesa: remove gl_renderbuffer::DataType
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 221c678329fd1c073d5f8dcf387129cd426ecf07 |
|
18-Jan-2012 |
Kristian Høgsberg <krh@bitplanet.net> |
gbm: Validate usage flags in gbm_bo_create_from_egl_image()
The entry point is supposed to validate that the EGLImage is suitable for
the passed in usage flags, but that was never implemented.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| ce1c949b162260cec84431913f7aac83cb1b938e |
|
17-Jan-2012 |
Anuj Phogat <anuj.phogat@gmail.com> |
intel: Return if pointer to intel_context is null
It is better to test if(intel == NULL) and simply return in that case.
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| dd7220652e65a8a23e7739eeee687f3d6a865b80 |
|
12-Jan-2012 |
Anuj Phogat <anuj.phogat@gmail.com> |
intel: Fix segfault in glXSwapBuffers with no bound context
Calling glXSwapBuffers with no bound context causes segmentation
fault in function intelDRI2Flush. All the gl calls should be
ignored after setting the current context to null. So the contents
of framebuffer stay unchanged. But the driver should not seg fault.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44614
Reported-by: Yi Sun <yi.sun@intel.com>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Yi Sun <yi.sun@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 35cdd7b6dbc763fe57bf466def0a4257ca09beb8 |
|
11-Jan-2012 |
Eric Anholt <eric@anholt.net> |
i965: Fix compiler warning from uninitialized "success" value.
This shouldn't happen, because the DDX should only load this driver if
IS_965. But better to do something defined in that case.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 06ad9adcb031b97af2ce9cd22b919b8befcec43b |
|
22-Dec-2011 |
Chad Versace <chad.versace@linux.intel.com> |
i965/gen7: Enable HiZ
This patch modifies all batches needed for HiZ. The batch length for
3DSTATE_HIER_DEPTH_BUFFER is also corrected from 4 to 3.
Performance +6.7% on Citybench.
num-frames: 400
resolution: 1918x1031
avg-hiz-off: 127.90 fps
avg-hiz-on: 136.50 fps
kernel: git://people.freedesktop.org/~anholt/linux.git branch=gen7-reset-sol sha=23360e4
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| cd2a24a4c2cf3aab8cbaf831d9712bc3c09cba66 |
|
30-Dec-2011 |
Eric Anholt <eric@anholt.net> |
i965/gen7: Enable transform feedback as long as kernel support is present.
The last major issue (intervening-read) is fixed, so let's turn this
on for real. The only other known issue is a hardware limitation for
tesselation with flat shading.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 14aff23e1b4d52d5e10a3aeb65c3f4c783498a35 |
|
02-Jan-2012 |
Brian Paul <brianp@vmware.com> |
intel: include version.h in intel_screen.c to silence warning
Signed-off-by: Brian Paul <brianp@vmware.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| e532b6288f01b63d8d8ba8c8dc08292967e65490 |
|
01-Dec-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
dri2: Add plumbing to get context version requirements and flags to drivers
This adds support for DRI_DRI2 version 3 to all of the DRI2 drivers.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| d0dc75c000d5af92648c7de901756400672b8447 |
|
06-Dec-2011 |
Brian Paul <brianp@vmware.com> |
mesa/drivers: use new swrast renderbuffer functions
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| c6abde211fa875f90e59e3709720cfe394669069 |
|
23-Nov-2011 |
Eric Anholt <eric@anholt.net> |
i965: Don't perform the precompile on fragment shaders by default.
It is useful to have this option for shader-db, and it was also good
at the time where we were rejecting shaders due to various internal
limits we hadn't supported yet. However, at this point the precompile
step takes extra time (since not all NOS is known at link time) and
spews misleading debug in the common case of debugging a real app.
This is left in place for VS, where we still have a couple of codegen
failure paths that result in link failure through precompile. Those
need to be fixed.
shader-db can still get at the debug info it wants using
"shader_precompile=true" driconf option. Long term, we can probably
build a good-enough app for shader-db to trigger real codegen.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| e5411d8fdc6a7dda18d82746b84197ef83ee0a13 |
|
17-Nov-2011 |
Chad Versace <chad.versace@linux.intel.com> |
i965/gen6: Enable HiZ by default
Regresses one Piglit test: bugs/fdo10370.
I'm not enabling HiZ for gen7 yet because it causes a mysterious
performance regression.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| da2816a45e6e3a33246a341fee72e6f893f315d9 |
|
16-Nov-2011 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Replace intel_renderbuffer::region with a miptree [v3]
Essentially, this patch just globally substitutes `irb->region` with
`irb->mt->region` and then does some minor cleanups to avoid segfaults
and other problems.
This is in preparation for
1. Fixing scatter/gather for mipmapped separate stencil textures.
2. Supporting HiZ for mipmapped depth textures.
As a nice benefit, this lays down some preliminary groundwork for easily
texturing from any renderbuffer, even those of the window system.
A future commit will replace intel_mipmap_tree::hiz_region with a miptree.
v2:
- Return early in intel_process_dri2_buffer_*() if region allocation
fails.
- Fix double semicolon.
- Fix miptree reference leaks in the following functions:
intel_process_dri2_buffer_with_separate_stencil()
intel_image_target_renderbuffer_storage()
v3:
- [anholt] Fix check for hiz allocation failure. Replace
``if (!irb->mt)` with ``if(!irb->mt->hiz_region)``.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 79653c12d6da4d89aaa73e4e8260a84d91f93593 |
|
15-Nov-2011 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Fix separate stencil in builtin DRI2 backend
intelAllocateBuffer() was oblivious to separate stencil buffers. This
patch fixes it to allocate a non-tiled stencil buffer with special pitch,
just as the DDX does.
Without this, any app that attempted to create an EGL surface with stencil
bits would crash. Of course, this affected only environments that used the
builtin DRI2 backend, such as Android and Wayland.
Fixes GLBenchmark2.1 on Android on gen7.
Note: This is a candidate for the 7.11 branch.
Tested-by: Louie Tsaie <louie.tsai@intel.com>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 875a757ddd103722cfe9a2b21035024aa5a23d32 |
|
03-Nov-2011 |
George Sapountzis <gsapountzis@gmail.com> |
dri: unify __DRIscreenRec
Also drop DriverAPI field, this is a static symbol and I don't see why it
should be accessed through __DRIscreenRec
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 7192c37294964b3f6e1551469f161593ec8f851d |
|
02-Nov-2011 |
George Sapountzis <gsapountzis@gmail.com> |
dri: unify __DriverAPIRec
I dropped the comments because they don't add much.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| ad3221587164c10ae16d85db514484b717cabc6f |
|
28-Oct-2011 |
Kristian Høgsberg <krh@bitplanet.net> |
dri: Drop driReadDrawableExtension
All DRI2 drivers support setting a separate read drawable.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 2e5a1a254ed81b1d3efa6064f48183eefac784d0 |
|
07-Oct-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
intel: Convert from GLboolean to 'bool' from stdbool.h.
I initially produced the patch using this bash command:
for file in {intel,i915,i965}/*.{c,cpp,h}; do [ ! -h $file ] && sed -i
's/GLboolean/bool/g' $file && sed -i 's/GL_TRUE/true/g' $file && sed -i
's/GL_FALSE/false/g' $file; done
Then I manually added #include <stdbool.h> to fix compilation errors,
and converted a few functions back to GLboolean that were used in core
Mesa's function pointer table to avoid "incompatible pointer" warnings.
Finally, I cleaned up some whitespace issues introduced by the change.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Chad Versace <chad@chad-versace.us>
Acked-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 8004a1cb95b8a195f3f4bbaa8d39d2f3297167de |
|
22-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Rename region->buffer to region->bo, and remove accessor function.
We call all the other drm_intel_bo pointers in intel/*.h "bo", so this
one was rather out of place.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 9fe197c62611815ebe74248033271ad9fd07ae06 |
|
21-Aug-2011 |
Chia-I Wu <olv@lunarg.com> |
intel: add support for __DRI_IMAGE_FORMAT_ABGR8888
It maps to MESA_FORMAT_RGBA8888_REV. Surfaces of the format can only be
sampled from but not render to.
Only i915 is tested.
Reviewed-by: Eric Anholt <eric@anholt.net>
[olv: add a check in intel_image_target_renderbuffer_storage]
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| b904321ed018c661271fb1fc3eefd1af0ec61c7f |
|
29-Jun-2011 |
Eric Anholt <eric@anholt.net> |
intel: Rely on intel_region_reference()'s support of *dst != NULL.
Reviewed-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 3af3c58dfd8b1ddc96fc10b6865de0cb26860dde |
|
09-Mar-2011 |
Benjamin Franzke <benjaminfranzke@googlemail.com> |
intel: Implement DRIimageExtension::dupImage
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| aea2236af60aee329e6ea73a41f2410d8eacc7b6 |
|
04-Jun-2011 |
Chad Versace <chad@chad-versace.us> |
intel: Request DRI2 buffers for separate stencil and hiz
When it is sensible to do so,
1) intelCreateBuffer() now attaches separate depth and stencil
buffers
to the framebuffer it creates.
2) intel_update_renderbuffers() requests for the framebuffer
a separate stencil buffer (DRI2BufferStencil).
The criteria for "sensible" is:
- The GLX config has nonzero depth and stencil bits.
- The hardware supports separate stencil.
- The X driver supports separate stencil, or its support has not yet
been determined.
If the hardware supports hiz too, then intel_update_renderbuffers()
also requests DRI2BufferHiz.
If after requesting DRI2BufferStencil we determine that X driver did not
actually support separate stencil, we clean up the mistake and never ask
for DRI2BufferStencil again.
CC: Ian Romanick <idr@freedesktop.org>
CC: Kristian Høgsberg <krh@bitplanet.net>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| f4efb7ff4f9cb0f6386e9b53f4dcfd9ef23dc9d1 |
|
26-May-2011 |
Chad Versace <chad@chad-versace.us> |
intel: Add assertions to intelCreateBuffer()
Assert that the GLX config has an expected depth/stencil bit combination:
one of d24/s8, d16/s0, d0/s0. These are the only depth/stencil
configurations that we advertise.
Remove the check for software stencil, because given the assertions'
constraints the check always fails.
CC: Ian Romanick <idr@freedesktop.org>
CC: Kristian Høgsberg <krh@bitplanet.net>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 6b2bf272ee173bd8ee6c731500861de21fa01b5f |
|
27-May-2011 |
Chad Versace <chad@chad-versace.us> |
intel: Add flags to intel_screen for hiz and separate stencil
Add the fields below to intel_screen. The expression in parens is the
value to which intelInitScreen2() currently sets the field.
GLboolean hw_has_separate_stencil (true iff gen >= 7)
GLboolean hw_must_use_separate_stencil (true iff gen >= 7)
GLboolean hw_has_hiz (always false)
enum intel_dri2_has_hiz dri2_has_hiz (INTEL_DRI2_HAS_HIZ_UNKNOWN)
The analogous fields in intel_context now inherit their values from
intel_screen.
When hiz and separate stencil become completely implemented for a given
chipset, then the respective fields need to be enabled.
CC: Ian Romanick <idr@freedesktop.org>
CC: Kristian Høgsberg <krh@bitplanet.net>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 89a82d72cafc1efbcf099e5229ba9b1cb53504f0 |
|
17-May-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
intel: Initial IS_GEN7 plumbing.
Currently, IS_GEN7, IS_IVYBRIDGE, IS_IVB_GT1, and IS_IVB_GT2 all return
false. This allows me to write the code for them before actually adding
the PCI IDs and thus enabling the hardware.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| e5169e9615e8391ea369415b356168717b8f7be0 |
|
06-May-2011 |
Kristian Høgsberg <krh@bitplanet.net> |
egl: Add a cursor use bit to MESA_drm_image
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 5dfba09d49ccec2655e4d22ef6f46b9c67862bc9 |
|
25-Apr-2011 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Use tiling for dri2AllocateBuffer implementation
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 7363088f9f9558b2bad3ac6da48947514a8cd790 |
|
25-Apr-2011 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Set gen in intelInitScreen, just copy value in intelInitContext
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 63325a05862f28b1d4dd65af6e78c73f78f502d3 |
|
23-Apr-2011 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Use X tiling for DRM EGL Images
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| f6ca4a304bf920ea6913b08638fb8eb3e020d446 |
|
09-Mar-2011 |
Eric Anholt <eric@anholt.net> |
intel: Don't complain when getparam fails due to a missing param.
This is an expected behavior when we're testing for the presence of
new kernel features.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 900a5c91eeb3acae7ee0ad331154531c4dba96e1 |
|
01-Mar-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
i965: Use negative relocation deltas to minimse vertex uploads
With relaxed relocation checking in the kernel, we can specify a
negative delta (i.e. pointing outside of the target bo) in order to fake
a range in a large buffer. We only then need to upload the elements used
and adjust the buffer offset such that they correspond with the indices
used in the DrawArrays.
(Depends on libdrm 0209428b3918c4336018da9293cdcbf7f8fedfb6)
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| dea5e57861ec998cb7ee913a8819752cb9fa946b |
|
15-Feb-2011 |
Eric Anholt <eric@anholt.net> |
intel: Use the current context rather than last bound context for a drawable.
If another thread bound a context to the drawable then unbound it, the
driContextPriv would end up NULL.
With the previous two fixes, this fixes glx-multithread-makecurrent-2,
despite the issue not being about the multithreaded makecurrent.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 8d68a90e225d831a395ba788e425cb717eec1f9a |
|
10-Feb-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
intel: use pwrite for batch
It's faster. Not only is the memcpy more efficiently performed in the
kernel (making up for the system call overhead), but by not using mmap
we remove the greater overhead of tracking the vma of every batch.
And it means we can read back from the batch buffer without incurring
the cost of a uncached read through the GTT.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 2adfde3aaee43d7ec974d25794a07fe02f36c6cd |
|
04-Feb-2011 |
Benjamin Franzke <benjaminfranzke@googlemail.com> |
intel: Implement dri2::{Allocate,Release}Buffer
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 45a56e4730a74a012ad712fd9b6013d900b04742 |
|
09-Jan-2011 |
Vinson Lee <vlee@vmware.com> |
intel: Include mfeatures.h in files that perform feature tests.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| df9f89154471ec162227ebce1681c5010f64e6e6 |
|
13-Dec-2010 |
Eric Anholt <eric@anholt.net> |
intel: Include stdbool so we can stop using GLboolean when we want to.
This requires shuffling the driconf XML macros around, since they use
true and false tokens expecting them to not get expanded to anything.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 4ac2f09e2034d8940a0ce9426a8d5c5d74bc63bd |
|
03-Dec-2010 |
Eric Anholt <eric@anholt.net> |
intel: Add an env var override to execute for a different GPU revision.
Sometimes I'm on the train and want to just read what's generated
under INTEL_DEBUG=vs,wm for some code on another generation. Or, for
the next gen enablement we'll want to dump aub files before we have
the actual hardware. This will let us do that.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| d3491e775fb07f891463b2185d74bbad62f3ed24 |
|
12-Oct-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Rename GLvisual and __GLcontextModes to struct gl_config
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| e7c8832c7f4cbf0add350fbb6fe7c955b4665363 |
|
24-Sep-2010 |
Eric Anholt <eric@anholt.net> |
intel: Dead comment removal.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 9ec0b2a45e18c045fd3dbcdf846fad7faf97494c |
|
22-Sep-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
dri2: Make createImageFromName() take a __DRIscreen instead of __DRIcontext
We can't expect to have a context when this is called, and we don't need one
so just require a __DRIscreen instead.
Reported by Yu Dai <yu.dai@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| f301932dba4cc75e810e0c051e39247128a899fc |
|
07-Jun-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Support EGL_MESA_image_drm
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 9087ba128089ed0dc00e6eb38f37126fb7557d3b |
|
04-Jun-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Take an intel_screen pointer in intel_alloc_region_* functions
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| a58514cc9c5cc5867f9140700462c5ac5749550d |
|
18-Aug-2010 |
Eric Anholt <eric@anholt.net> |
i915: Enable ARB_fragment_shader by default.
Now that we have glsl2 with if flattening in place, most shaders will
just work. Remaining failing shaders will mostly be due to loop
unrolling (in progress), some possible if flattening failures in
inlining functions (planning on fixing), and the register/instruction
count limits.
While the GLSL and GLSL-ES specs say that shaders shouldn't fail to
compile/link due to register/instruction limits, in practice we're not
the first vendor to expose GLSL on hardware with these limitations.
The benefit to application developers of providing a better language
for GPU programming is greater than the pain of having to handle
instruction limits (which they had to for ARB_fp on this hardware
anyway)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| e67c338b415c983bee570e6644b9684d8d1fc99b |
|
19-May-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Throttle after doing copyregion/swapbuffers round trip
Before we would throttle in the flush callback prior to round-tripping
to the server to do copyregion or swapbuffer. Now, instead just note
that we need to throttle and do it in intel_prepare_render(), which
will be called after receiving the response from the server but before
we start rendering the next frame. Even if the server also throttles
us in swapbuffer, this just makes the throttling a no-op when we hit
intel_prepare_render(). With that we can drop the
using_dri2_swapbuffers hack and just always throttle.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 0870e4a2022cff79805613ae7cd4b9237a2f564c |
|
02-May-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Merge branch 'gles2-2'
Conflicts:
src/mesa/drivers/dri/common/dri_util.h
|
| 5efee4d4e68067a3fd85b9ff6a2636f502538768 |
|
28-Apr-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Advertise GLES1/2 for i915+ when enabled
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 4b69100bdcf26dbb5be4d600b7ca5f5cdf6e8f20 |
|
27-Apr-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
dri: Add DRI entrypoints to create a context for a given API
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| a7a9a91d7b28e5b5faed509d00f0f951e3136b1b |
|
27-Apr-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
dri: Add DRI entrypoints to create a context for a given API
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 234286c0f8b7d30ed49223c648d4c73c1a517ab3 |
|
22-Apr-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
DRI2: add config query extension
Add a new DRI2 configuration query extension. Allows for DRI2 client
code to query for common DRI2 configuration options.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 800a4b202f8b23540dbb128e780ca8b7e90d1f46 |
|
16-Mar-2010 |
Eric Anholt <eric@anholt.net> |
intel: Remove more code for x8z24 visuals, since we only do s8z24.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| a232cc59e3f8ac8462c23b1a83e0ba60b451e681 |
|
05-Mar-2010 |
Eric Anholt <eric@anholt.net> |
intel: Remove support for the DRI1 TFP extension.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| bb35000b4b6dfe60048b2f5d60bc102c4a7fd791 |
|
05-Mar-2010 |
Eric Anholt <eric@anholt.net> |
intel: Remove non-kernel-exec-fencing support.
Shaves 60k off the driver from removing the broken spans code. This
means we now require 2.6.29, which seems fair given that it's a year
old and we've removed support for non-KMS already in the last release
of 2D.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 8e7a8d65931a650534e0f5c4e0d8118cd6f7636e |
|
03-Mar-2010 |
Eric Anholt <eric@anholt.net> |
i915: Enable texture tiling by default.
This now passes piglit testcases, and shows performance improvements
on openarena. Blit-heavy apps may see degradation, but the
expectation is that the common case of 3D rendering will see
significant wins.
This regresses gen-teximage on my 855, and no piglit tests on my 945.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 06d1472ffa0648efa9374fa227894fbf0b0be054 |
|
03-Mar-2010 |
Eric Anholt <eric@anholt.net> |
i915: Tell the kernel when we actually need fence registers on our BOs.
This improves tiled texture performance of OA on my 945 from 25.3fps
to 29.0fps, whereas untiled is 28.2fps, by avoiding stalls for fence
register changes.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| d7322c9d420e484bc3c7cecb873b04cf7da7f33a |
|
26-Feb-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Lookup requested renderbuffer in intel_create_image_from_renderbuffer
Previously we'd use the current renderbuffer.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| c26247100bfd453a7ec013f630abe366c12fbd8b |
|
12-Feb-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Implement DRI image extension
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| d449627829e1a4a3250a1a723af2f4e3cd5fd194 |
|
18-Feb-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Implement the DRI2 invalidate function properly
This uses a stamp mechanisms to mark the DRI drawable as invalid.
Instead of immediately updating the buffers we just bump the drawable
stamp and call out to DRI2GetBuffers "later".
"Later" used to be at LOCK_HARDWARE time, and this patch brings back
callouts at the points where we used to call LOCK_HARDWARE. A new function,
intel_prepare_render(), is called where we used to call LOCK_HARDWARE,
and if the buffers are invalid, we call out to DRI2GetBuffers there.
This lets us invalidate buffers only when notified instead of on
every glViewport() call. If the loader calls the DRI invalidate
entrypoint, we disable viewport triggered buffer invalidation.
Additionally, we can clean up the old viewport mechanism a bit,
since we can just invalidate the buffers and not worry about
reentrancy and whatnot.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 61d26bc82e7c4100acfb551cbb0ba9d84bbc4ba5 |
|
08-Feb-2010 |
Francisco Jerez <currojerez@riseup.net> |
dri2: Event driven buffer validation.
When a buffer invalidation event is received from the X server, the
"invalidate" hook of the DRI2 flush extension is executed: A generic
implementation (dri2InvalidateDrawable) is provided that just bumps
the "pStamp" sequence number in __DRIdrawableRec.
For old servers not supporting buffer invalidation events, the
invalidate hook will be called before flushing the fake front/back
buffer (that's typically once per frame -- not a lot worse than the
situation we were in before).
No effort has been made on preserving backwards compatibility with
version 2 of the flush extension, but I think it's acceptable because
AFAIK no released stack is making use of it.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 2d99588b3556928a0879b4160210ac771dbf1f0b |
|
11-Feb-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Track named regions and make sure we only have one region per named bo
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| cc57baff5f40ba0ab3d3044c4fcd867e5b0e640e |
|
11-Feb-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
i915: Remove always-true irq_active struct intel_screen field
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| c9b0f04b1f3ba4765733fcbb91a7cc314bf83e5c |
|
11-Feb-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
i915: Remove a few DRI1 era struct intel_screen fields
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 5777dee02c6497207e6b4b9d68de072e7be7c06e |
|
11-Feb-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
i915: Drop intelScreenPrivate typedef and just call it struct intel_screen
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 6bd9da01eacf9d100dfb0a9529700aa894a23d24 |
|
08-Feb-2010 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Don't expose GLX_SWAP_EXCHANGE_OML
We can't always guarantee that the swap will happen by exchange, so we
can't expose this mode. GLX_SWAP_UNDEFINED_OML already covers the
case where the swap *might be* by exchange.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| bb65a1d009e3d8398492aa30d944c17a40535aa1 |
|
08-Feb-2010 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Expose a minimal number of configs with accumulation buffer
Expose one config per color depth that includes accumulation buffer.
We could probably expose only one config with accumulation buffer, but
that would require figuring out the actual color depth. This is
easier and only exposes 2 useless configs.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 3cce4a1e10361458630511543b7a8a6438544775 |
|
08-Feb-2010 |
Ian Romanick <ian.d.romanick@intel.com> |
dri: Allow selective generation of accum. buffer configs
Modify the interface to driCreateConfigs allowing drivers to not
expose configs with an accumuation buffer. All of the drivers calling
function have been updated to pass true for the accumulation
selector. This maintains the current behavior.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Corbin Simpson <MostAwesomeDude@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 73e24cd5a7a0760726a681dda5b88805ddcf1555 |
|
08-Feb-2010 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Stop exposing useless 24 depth/0 stencil configs
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 6d91f9a024f6e3bc3ae1e71b80e2ec07d60490cf |
|
08-Feb-2010 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Remove redundant init of depth_bits / stencil_bits in intelInitScreen2
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 066f45c7a1888ca8a9de78a81b38af7c74bca9e1 |
|
08-Feb-2010 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Update comment in intelInitScreen2 to noting DRI2 protocol issues
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 2ec50d256d49ff3b987459ed42a5dc66f02a6b9d |
|
03-Feb-2010 |
Francisco Jerez <currojerez@riseup.net> |
mesa: Factor out the fb initialization details from _mesa_new_framebuffer.
This should make things easier for drivers wanting to work with a
"subclass" of gl_framebuffer.
The complementary "_mesa_initialize_framebuffer" function is now
called "_mesa_initialize_window_framebuffer" for the sake of
symmetry.
Signed-off-by: Brian Paul <brianp@vmware.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| c6e26d76c7f59b51be00c960112c85ad4b3d2334 |
|
31-Jan-2010 |
Vinson Lee <vlee@vmware.com> |
intel: Remove unnecessary headers.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 06d228d8b92b7f4031f0596d498c24c4ed952e68 |
|
26-Jan-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
intel: make sure we update the renderbuffers after a swap
Now that LOCK_HARDWARE is gone, we don't have a convenient place to
update the renderbuffers everywhere we need them. So grab new buffers
when we invalidate the old ones until we optimize things further.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 7aed23c36288c2b343073d6d06ca0ea167805cd3 |
|
25-Jan-2010 |
Eric Anholt <eric@anholt.net> |
intel: Don't do client-side frame throttling with DRI2 SwapBuffers.
The server side does the throttling on our behalf now by putting the
client to sleep, so we don't need our previous hacks for limiting the
number of outstanding frames. Same effect as
7d4e674b212c9dc6408c13913a399bd4a2b9a1e3.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| c7fc9bfb2207638a479ddaff3ad108ffd9cd294a |
|
25-Jan-2010 |
Eric Anholt <eric@anholt.net> |
Revert "intel: Use the new DRI2 flush invalidate entrypoint to signal frame done."
This reverts commit 7d4e674b212c9dc6408c13913a399bd4a2b9a1e3. It broke
throttling in the non-new-DRI2 case.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 9b22427911ad27efc1f36faee9462c6082d0417c |
|
25-Jan-2010 |
Brian Paul <brianp@vmware.com> |
Merge branch 'mesa_7_7_branch'
Conflicts:
src/mesa/drivers/dri/intel/intel_screen.c
src/mesa/drivers/dri/intel/intel_swapbuffers.c
src/mesa/drivers/dri/r300/r300_emit.c
src/mesa/drivers/dri/r300/r300_ioctl.c
src/mesa/drivers/dri/r300/r300_tex.c
src/mesa/drivers/dri/r300/r300_texstate.c
|
| fb6bff3712d71cfe131fbf70154d326cdf39e7c8 |
|
23-Jan-2010 |
Vinson Lee <vlee@vmware.com> |
intel: Remove unnecessary headers.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 7d4e674b212c9dc6408c13913a399bd4a2b9a1e3 |
|
19-Jan-2010 |
Eric Anholt <eric@anholt.net> |
intel: Use the new DRI2 flush invalidate entrypoint to signal frame done.
Previously for frame throttling we would wait on the first batch after
a swap before emitting another swap, because we had no hook after a
swap was emitted. This meant that if an app managed to squeeze
everything it for a frame had into one batch, it would lock-step with
the GPU. With the swapbuffers changes, we now have the entrypoint we
want.
This takes the WoW intro screen from 25% GPU idle and visibly jerky to
4-5% GPU idle and rather smooth. Other apps such as OpenArena have
run into this problem as well.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| c6ef705e414c8e93ee471f50d15ada3492a9b067 |
|
11-Jan-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
Merge branch 'master' of ssh://people.freedesktop.org/~jbarnes/mesa
Conflicts due to DRI1 removal:
src/mesa/drivers/dri/intel/intel_context.c
src/mesa/drivers/dri/intel/intel_screen.c
|
| 7c50d29f7ced3d60e52ee0146d982b49ea421de2 |
|
08-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel/DRI2: add DRI2flushExtension support with invalidate hook
Needed to support the SwapBuffers code properly.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 51362a75a70f982dc076064ff266e8eb6a0e3a8b |
|
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: intelScreenContext() is no longer used
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 5a0b60aa1b9c1c4ce15c6b461e24622e9f71286d |
|
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Remove remaining dri2.enabled tests
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| d282128ff68cc58bc3f5b808031c5fe7325bd69b |
|
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Remove struct intel_framebuffer
With the vsync fields no longer relevant and by refactoring the code
to no longer use color_rb[0-1] we can just use struct gl_framebuffer
directly.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| a6e1d3edac90016ca9662ca0a9707a2d4fba1726 |
|
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Remove client-side vblank code
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| f55d0920cd8e504a09e3741716fc47381c03f6ac |
|
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Drop DRI1 static regions
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 3566bc7584475daa852f4d5735a81a28c032297d |
|
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Drop DRI1 SwapBuffer implementation
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 4611f08c07091f2f516156f4725c2ae5fc3579c4 |
|
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Drop DRI1 CopySubBuffer implementation
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 48c0ff14240044935049a1114edfc69bc6682b95 |
|
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Drop DRI1 support
The DDX driver stopped supporting DRI1 so we're dropping support for
that from the DRI driver too.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 39a0e4e7de379a182c1544fa24d5cb2a7687ec72 |
|
01-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Push __driDriverExtensions out of dri_util.c and into the drivers
This lets the individual drivers select which extensions to advertise.
Specifically, most drivers (tdfx, sis, savage etc) don't support DRI2
but the shared extension list in dri_util.c does list the DRI2 extension.
Pushing the list into the drivers, lets us avoid listing the DRI2
extension for drivers that don't support it.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| d61f07318c8678901b948fdaa8ccdf37aa3203e9 |
|
01-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Remove leftover __DRI{screen,drawable,context}Private references
As part of the DRI driver interface rewrite I merged __DRIscreenPrivate
and __DRIscreen, and likewise for __DRIdrawablePrivate and
__DRIcontextPrivate. I left typedefs in place though, to avoid renaming
all the *Private use internal to the driver. That was probably a
mistake, and it turns out a one-line find+sed combo can do the mass
rename. Better late than never.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 1e4677a61f0576c32e65e9202fa08e81e1162f65 |
|
27-Dec-2009 |
Eric Anholt <eric@anholt.net> |
intel: Remove dead fthrottle_mode option. We only do IRQ waits.
Noticed by clang.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 5727147f894137f194d8efc7adb81b80a9b5acd7 |
|
22-Dec-2009 |
Eric Anholt <eric@anholt.net> |
intel: Remove unused stored values reported by clang.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 827ba44f6ee83ab21c6a2b09323f6f1df4a7d4c8 |
|
18-Nov-2009 |
Eric Anholt <eric@anholt.net> |
intel: Remove non-GEM support.
This really isn't supported at this point. GEM's been in the kernel for
a year, and the fake bufmgr never really worked.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 409469fb70682cd819ab405e0f92a4659381cfbe |
|
30-Oct-2009 |
Brian Paul <brianp@vmware.com> |
intel: fix up some XRGB breakage
We weren't choosing the right XRGB span functions for reading the
framebuffer. XRGB formats still aren't turned on yet though.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 4a253431abf43a0638afb43605b44a8742b72a60 |
|
30-Oct-2009 |
Brian Paul <brianp@vmware.com> |
intel: update intel_create_renderbuffer(format), add XRGB support
Pass a gl_format to intel_create_renderbuffer() instead of GLenum.
Add cases for MESA_FORMAT_XRGB8888 textures and renderbuffers.
However, we don't yet create any renderbuffers or textures with that
format. It seems the default alpha value is zero instead of one.
Need to investigate that first.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 17ef1f6074d6107c167f1956a5c60993904c0b72 |
|
08-Oct-2009 |
Chia-I Wu <olvaffe@gmail.com> |
mesa: Enable remap table in core.
This enables the remap table in core. driInitExtensions is adapted to
use the remap table. All uses of extension_helper.h are replaced by
remap_helper.h. The chicken-egg problem of the DRI drivers is also
solved.
It is now also possible to pass NULL extensions to driInitExtensions.
It will cause driInitExtensions to map all known functions. This
functionality is used by software drivers and EGL_i915.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 81aa5d717bd0098608e9cc292b316293800c7e11 |
|
29-Jul-2009 |
Eric Anholt <eric@anholt.net> |
i915: Add stub ARB_occlusion_query support under a driconf debug option.
This is useful for enabling our GLSL testcases using the 2.0 entrypoints
even though we don't have full GL 2.0.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 862a2a55b35d1dec9224b025a6e7a0cf8593a6a7 |
|
29-Jul-2009 |
Eric Anholt <eric@anholt.net> |
i915: Add optional support for ARB_fragment_shader under a driconf option.
Other vendors have enabled ARB_fragment_shader as part of OpenGL 2.0
enablement even on hardware like the 915 with no dynamic branching or
dFdx/dFdy support. But for now we'll leave it disabled because we don't
do any flattening of ifs or loops, which is rather restrictive.
This support is not complete, and may be unstable depending on your shaders.
It passes 10/15 of the piglit glsl tests, but hangs on glean glsl1.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| a962c07cc3e5fba3be5c08071bc7abc5d840f138 |
|
08-Aug-2009 |
Eric Anholt <eric@anholt.net> |
Revert "i965: Disable texture tiling by default."
This reverts commit b8e638d4895d2d342306bb6443a455f73903ce20.
Now that the known hangs and misrendering issues are fixed, I'm ready to
start encouraging it by default again.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| d2f6d6ce49699d35d6b6a234fe17a27d99f4b267 |
|
28-Jul-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'mesa_7_5_branch'
Conflicts:
Makefile
configs/default
docs/relnotes.html
src/mesa/main/version.h
|
| 3dbaf68bdc1f7427a60bdcc8da635ae7a27aa3cd |
|
27-Jul-2009 |
Brian Paul <brianp@vmware.com> |
intel: Fix leak of DRI option info due to using the wrong free routine.
(cherry picked from commit 6d66f23c50ebe8f973757b6fd1b81c9b7920c447)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| d2f56fe687afb2c259338542971e432dd448671b |
|
27-Jul-2009 |
Brian Paul <brianp@vmware.com> |
intel: Use _mesa_warning() to report GEM warnings
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 6d66f23c50ebe8f973757b6fd1b81c9b7920c447 |
|
02-Jul-2009 |
Eric Anholt <eric@anholt.net> |
intel: Fix leak of DRI option info due to using the wrong free routine.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| cb4ef34214d61fb48bdff689a85ea107060e061b |
|
02-Jul-2009 |
Eric Anholt <eric@anholt.net> |
intel: Init num_fences to clean up valgrind warning.
Valgrind doesn't know that a successful getparam sets the target of the
pointer, so just set the value beforehand.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 39366ed995310c95d95e0c7a33fb0bec637a00b6 |
|
08-Jun-2009 |
Brian Paul <brianp@vmware.com> |
intel: remove extra \n from warning string
(cherry picked from commit 42e9bde0fa2276b8f5bb434328eea7665794b127)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 56235ae5049bee929c83f6932db077afaa5930f8 |
|
14-May-2009 |
Robert Ellison <papillo@vmware.com> |
i965: send all warnings through _mesa_warning()
One warning message:
drm_i915_getparam: -22
was still being sent to fprintf(). This causes all Piglit tests to fail,
even with MESA_DEBUG=0.
Using _mesa_warning() to emit the message allows the general Mesa controls
for messages like this to be applied.
(cherry picked from commit bc3270e99f5c39544aaf831742db14796ab83a6a)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| d027e8feff7d38cccadc6aaccc0454b21ce4dca0 |
|
16-Jun-2009 |
Shuang He <shuang.he@intel.com> |
intel: Release fb backing regions in intelDestroyBuffer()
Fixes memory leak when destroying framebuffers.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| b8e638d4895d2d342306bb6443a455f73903ce20 |
|
24-Jun-2009 |
Eric Anholt <eric@anholt.net> |
i965: Disable texture tiling by default.
I haven't fixed all the regressions yet, and it'll be easy to re-enable when
the known problems are fixed.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 8d482227915552c414e13743652e6794c4313ae2 |
|
17-Jun-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'mesa_7_5_branch'
Conflicts:
src/mesa/main/api_validate.c
|
| b30dc2c66aeaad6661eef515a08a3da89aa07cb2 |
|
10-Jun-2009 |
Eric Anholt <eric@anholt.net> |
i915: Add an option for testing the effect of early Z in classic mode.
The early Z stuff is supposed to be unsafe without some more work in the
enable/disable path (in particular, how do we want to get it disabled on
the way out to the X Server?), but at the moment is 6% in OA.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 42e9bde0fa2276b8f5bb434328eea7665794b127 |
|
08-Jun-2009 |
Brian Paul <brianp@vmware.com> |
intel: remove extra \n from warning string
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 1ba96651e12b3c74fb9c8f5a61b183ef36a27b1e |
|
03-Jun-2009 |
Eric Anholt <eric@anholt.net> |
intel: Add support for tiled textures.
This is about a 30% performance win in OA with high settings on my GM45,
and experiments with 915GM indicate that it'll be around a 20% win there.
Currently, 915-class hardware is seriously hurt by the fact that we use
fence regs to control the tiling even for 3D instructions that could live
without them, so we spend a bunch of time waiting on previous rendering in
order to pull fences off. Thus, the texture_tiling driconf option defaults
off there for now.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| bc3270e99f5c39544aaf831742db14796ab83a6a |
|
14-May-2009 |
Robert Ellison <papillo@vmware.com> |
i965: send all warnings through _mesa_warning()
One warning message:
drm_i915_getparam: -22
was still being sent to fprintf(). This causes all Piglit tests to fail,
even with MESA_DEBUG=0.
Using _mesa_warning() to emit the message allows the general Mesa controls
for messages like this to be applied.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| e7aef006e50d0b859c621267af8376f5a0f43445 |
|
06-Apr-2009 |
Eric Anholt <eric@anholt.net> |
i965: Use GTT maps when available to upload vertex arrays and system VBOs.
This speeds up OA on my GM45 by 21% (more than the original CPU cost of
the upload path). We might still be able to squeeze a few more percent out
by avoiding repeatedly mapping/unmapping buffers as we upload elements into
them.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 5cca1ceb814ea9c5991d8b694d99a588c40b9860 |
|
06-Apr-2009 |
Eric Anholt <eric@anholt.net> |
intel: Clean up some a leftover from sedding of bufmgr context->screen move.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 66175aac7609ad314f25fbdff0d3958af310dc24 |
|
18-Mar-2009 |
Eric Anholt <eric@anholt.net> |
Fix DRI2 accelerated EXT_texture_from_pixmap with GL_RGB format.
This requires upgrading the interface so that the argument to
glXBindTexImageEXT isn't just dropped on the floor. Note that this only
fixes the accelerated path on Intel, as Mesa's texture format support is
missing x8r8g8b8 support (right now, GL_RGB textures get uploaded as a8r8gb8,
but in this case we're not doing the upload so we can't really work around it
that way).
Fixes bugs with compositors trying to use shaders that use alpha channels, on
windows without a valid alpha channel. Bug #19910 and likely others as well.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 0f04a1d3f8989b0a391e6dad80abf06ce151d1f1 |
|
07-Mar-2009 |
Brian Paul <brianp@vmware.com> |
mesa: remove last of _mesa_unreference_framebuffer() calls
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 40bc2748c2781600c748e546160bcc2aab637825 |
|
06-Mar-2009 |
Eric Anholt <eric@anholt.net> |
intel: Add always_flush_batch driconf option for making small batchbuffers.
This can improve debugging with INTEL_DEBUG=batch,sync by giving smaller
batchbuffers.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| f3687284c12f34268172b9c60e2effd697162129 |
|
06-Mar-2009 |
Eric Anholt <eric@anholt.net> |
intel: Add always_flush_cache driconf option for debugging cache flush failure.
I keep wanting to hack this knob in as a one-time thing, so it seemed useful
to have all the time.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 160c3617fc8867edc445b1ba62fc996c4630cc35 |
|
26-Feb-2009 |
Eric Anholt <eric@anholt.net> |
intel: Disable creating DRI2 FBconfigs with depth size != color size.
While it's a nice idea to be able to allow clients to choose a smaller
(or bigger for 16bpp screens!) depth size, right now DRI2 hands back a buffer
with a size that matches the drawable, rather than being based off of the
visual. This led to problems in readback as parts of the driver disagreed
on what format the depth buffer was really in.
Fixes the remainder of bug #19447.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 119f34e2a52d7e074ea51d49acf6c11d83142ccc |
|
26-Feb-2009 |
Eric Anholt <eric@anholt.net> |
intel: Fix up x8r8g8b8 renderbuffer format so that alpha=1 spans code happens.
I was lured into a false sense of security by the fact that the spans code was
already there, and a bunch of tests didn't catch the problem. oglconform's
mask.c did, though.
Bug #19970.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 60953059ea2319eae4d737831824dbce08ee1725 |
|
11-Feb-2009 |
Eric Anholt <eric@anholt.net> |
intel: Clean up several 965 memory leaks on context destroy.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 5d5ae371eaeca7e33e638af3aee1ae8e162db0a7 |
|
10-Feb-2009 |
Eric Anholt <eric@anholt.net> |
intel: Add x8r8g8b8 visuals to DRI1 fbconfigs alongside a8r8gb8.
This involved fixing driConcatConfigs to not return const (which had made a
mess of a previous patch too).
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| eaf15db895e3a5c6c5ccc2f23a4f0fa522855868 |
|
10-Feb-2009 |
Michel Dänzer <daenzer@vmware.com> |
gallium: Fixups for driCreateConfigs MSAA support.
Add the MSAA samples array or make sure its contents are initialized.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| e13593678f62941db06b7ae1a21b81c643371659 |
|
09-Feb-2009 |
Brian Paul <brianp@vmware.com> |
re-add MSAA support
(cherry picked from commit f7d80aa00611917bc8ce637136d982b151b8f44f)
This also involved adding the new MSAA fields to driCreateConfigs().
Also, re-add prog_instructions->Sampler field for i965 driver. Will
have to revisit that.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 24ff169486e315671c09cd8a57a311a935ccfff5 |
|
31-Jan-2009 |
Eric Anholt <eric@anholt.net> |
intel: Correct FBconfig color masks with DRI2. Fail at copy and paste.
This still leaves us with a broken depth 32 visual, but now it's the server's
visual setup that's at fault.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 3ee21f30cda27e0ee1357f930163526622ba9434 |
|
29-Jan-2009 |
Eric Anholt <eric@anholt.net> |
intel: Expose more FBconfigs in the 3D driver.
We can support any combination of (a8r8g8b8, x8r8g8b8, r5g6b5) x (z0,z24,z24s8)
on either class of chipsets. The only restriction is no mixing bpp when also
mixing tiling. This shouldn't be occurring currently.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 6c244b0f326504ae6add1ddcb407e73c3e72da78 |
|
26-Jan-2009 |
Brian Paul <brianp@vmware.com> |
intel: #include clean-ups
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| aae2729aeb3f6eed26e8f7673f47f2b978786bb1 |
|
26-Jan-2009 |
Brian Paul <brianp@vmware.com> |
intel: make intelUpdateScreenFromSAREA() static
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 66c7f06413cc96a75befa4323677b26a2917ebb3 |
|
26-Jan-2009 |
Brian Paul <brianp@vmware.com> |
intel: remove unused var
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 4006c5e4526a1cdb910500764590e39d32750967 |
|
26-Jan-2009 |
Brian Paul <brianp@vmware.com> |
intel: move intelInitExtensions() and related code into new intel_extensions.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 6fcebbe719eab1f8e292c8dcd6c3e898b0f8d261 |
|
26-Jan-2009 |
Brian Paul <brianp@vmware.com> |
intel: Move swap-related functions from intel_buffers.c to new intel_swapbuffers.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 39e6d0d8108fe6d222865e7bb9de1e3cea18b4c4 |
|
20-Jan-2009 |
Timo Aaltonen <tjaalton@cc.hut.fi> |
[intel] Go back to using the typedef for the sarea struct
The upstream linux kernel headers and libdrm kernel headers disagree on the
tag name for the sarea struct: _drm_i915_sarea vs drm_i915_sarea. They
both typedef it to drm_i915_sarea_t though, so just use that.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| b359350017a8f0328912f19d233bcdcc256aded1 |
|
20-Dec-2008 |
Dave Airlie <airlied@redhat.com> |
Remove third buffer support from Mesa.
This is part of the deprecated pageflipping infrastructure.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| cd031749a75883a6fbf8fb7bf989b77a7c705819 |
|
28-Nov-2008 |
Dave Airlie <airlied@redhat.com> |
intel: restore old vertex submit paths for i8xx hardware.
Intel docs state that only 830/845 have VBOs, 855/865 don't. So
lets just not use them on i8xx at all.
This restores the old pre-vbo code and uses it on all 8xx hw.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 5a46e176715b0eae7b8a715e8aec42f5a27214fc |
|
20-Sep-2008 |
Keith Whitwell <keith@tungstengraphics.com> |
mesa: standardize on C99's uint*_t instead of u_int*_t
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| ecadb51bbcb972a79f3ed79e65a7986b9396e757 |
|
18-Sep-2008 |
Brian Paul <brian.paul@tungstengraphics.com> |
mesa: added "main/" prefix to includes, remove some -I paths from Makefile.template
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 904f31a62444d9f7e9b12ddafaa4beeb7fed6dfa |
|
17-Sep-2008 |
Eric Anholt <eric@anholt.net> |
intel: Destroy bufmgr in screen destroy, not context.
Caused server crashes on second context creation since
7e0bbdcf033981282978554c2e68ce48b55aa291.
Bug #17600.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 201d3419a6432a0f35dff48e606649092afb7ff7 |
|
11-Sep-2008 |
Eric Anholt <eric@anholt.net> |
intel: Remove dead allow_batchbuffer param.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 35fd72756a05463568d94862f4fcd234903e1204 |
|
08-Sep-2008 |
Eric Anholt <eric@anholt.net> |
intel: track move of bo_exec from drivers to bufmgr.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 3628185f566e178a12b493fb89abf52b4b281f99 |
|
06-Sep-2008 |
Eric Anholt <eric@anholt.net> |
intel: track bufmgr move to libdrm_intel and bufmgr_fake irq emit/wait change.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 7e0bbdcf033981282978554c2e68ce48b55aa291 |
|
04-Sep-2008 |
Eric Anholt <eric@anholt.net> |
intel: Move the bufmgr back to the screen.
Mesa requires that we be able to share objects between contexts, which means
that the objects need to be created by the same bufmgr, and the bufmgr
internally requires pthread protection for thread safety.
Rely on the bufmgr having appropriate locking.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| f56b569e9af356c11869ee49a4669bb01b75397e |
|
13-Aug-2008 |
Kristian Høgsberg <krh@redhat.com> |
DRI2: Drop sarea, implement swap buffers in the X server.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| f75843a517bd188639e6866db2a7b04de3524e16 |
|
24-Aug-2008 |
Dave Airlie <airlied@linux.ie> |
Revert "Revert "Merge branch 'drm-gem'""
This reverts commit 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a |
|
24-Aug-2008 |
Dave Airlie <airlied@linux.ie> |
Revert "Merge branch 'drm-gem'"
This reverts commit 53675e5c05c0598b7ea206d5c27dbcae786a2c03.
Conflicts:
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 53675e5c05c0598b7ea206d5c27dbcae786a2c03 |
|
09-Aug-2008 |
Eric Anholt <eric@anholt.net> |
Merge branch 'drm-gem'
Conflicts:
src/mesa/drivers/dri/intel/intel_span.c
src/mesa/main/fbobject.c
This converts the i915 driver to use the GEM interfaces for object management.
|
| e9bf3e4cc9a7e4bcd4c45bd707541d26ecdf0409 |
|
31-Jul-2008 |
Jesse Barnes <jbarnes@hobbes.lan> |
intel: sync to vblank by default
Effectively default to vblank_mode=3 on Intel to avoid tearing by default.
Users wanting to go "as fast as possible" (despite not being able to see frames
faster than their refresh rate allows) can still set the vblank_mode manually.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 04c98089d15d27e541561d3fb35b9c28b699833b |
|
25-Jul-2008 |
Dave Airlie <airlied@linux.ie> |
Revert "intel: disable zero-copy TFP."
This reverts commit 94979950e8991bd44899eb4067c3ae43449ce51e.
I've fixed it instead
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 94979950e8991bd44899eb4067c3ae43449ce51e |
|
25-Jul-2008 |
Dave Airlie <airlied@redhat.com> |
intel: disable zero-copy TFP.
patch from Fedora. maybe someone can fix this later but for now
lets try and release Mesa so ajax can live his life and get Xorg 7.4 out.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 2e841880cfc1006a2818d4a8bfefd21136dc39a9 |
|
11-Jul-2008 |
Eric Anholt <eric@anholt.net> |
drm-gem: Use new GEM ioctls for tiling state, and support new swizzle modes.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 19f585a3cf65887e249d630fe43e83e7e7618dfa |
|
02-Jul-2008 |
Eric Anholt <eric@anholt.net> |
intel-gem: Fix Y-tiling span setup.
The boolean that the server gives us for whether the region is tiled was
getting used as the enum for what tiling mode. Instead, guess the correct
tiling in screen setup.
Also, fix the Y-tiling pitch setup. The pitch to the next tile in Y is
32 scanlines, not 8.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| e74f54793e45dd2e36474f6fc527456647f32efd |
|
02-Jul-2008 |
Eric Anholt <eric@anholt.net> |
intel-gem: Move bit 6 x tiling swizzle to a driconf option, and add new mode.
It turns out that it's not just deviceID dependent, and there's some additional
undefined factor that determines the bit 6 swizzling. It's now controllable
with swizzle_mode=[012] until we get a response on how to automatically detect.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 654258a4fe5e7114022c6e02f2844fc469fcc6f3 |
|
18-Jun-2008 |
Eric Anholt <eric@anholt.net> |
Merge commit 'origin/master' into drm-gem
|
| 8d976aedc4654bc66b80f22690e3674f1ef46183 |
|
12-Jun-2008 |
Brian Paul <brian.paul@tungstengraphics.com> |
comments
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 0227d91a9e3cf65aae3266d100eebd3459dff4c3 |
|
11-Jun-2008 |
Eric Anholt <eric@anholt.net> |
[gem] Enable bo_reuse by default.
The objects are swappable, so we're less concerned by excessive object
allocation now, and it's about a 20% performance improvement. If we get
concerns about the memory consumption from others, we can look into a
compromise position later.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 4b5b008d54e86ac4f0a2176429d062100978ca8c |
|
03-Jun-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Convert drivers to using libdrm bufmgr code.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 537bbe6dec780f6f85838fe7e6036579c509f8a6 |
|
06-May-2008 |
Keith Packard <keithp@keithp.com> |
[intel-GEM] Add tiling support to swrast.
Accessing tiled surfaces without using the fence registers requires that
software deal with the address swizzling itself.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| df4b49c2cedde60c02f869977ee426f280b2985b |
|
06-May-2008 |
Keith Packard <keithp@keithp.com> |
Dump buffer tiled status from intelPrintSAREA
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| eb10cdc838fc31ea2cf59f556f6f7d8b072f5bae |
|
02-May-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Fix build for GEM. TTM is now disabled, and fencing is gone.
Fencing was used in two places: ensuring that we didn't get too many frames
ahead of ourselves, and glFinish. glFinish will be satisfied by waiting on
buffers like we would do for CPU access on them. The "don't get too far ahead"
is now the responsibility of the execution manager (kernel).
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| acba9c1771d653126fd6f604cb80c050b9e8ffb3 |
|
29-Apr-2008 |
Michel Dänzer <michel@tungstengraphics.com> |
Change default of driconf "allow_large_textures" to announce hardware limits.
The previous default these days served mostly to cause artifical problems with
GLX compositing managers like compiz (see e.g.
http://bugs.freedesktop.org/show_bug.cgi?id=10501).
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| e82dd8c6e1fa2fff5b960de26961080ba5e9651d |
|
27-Mar-2008 |
Kristian Høgsberg <krh@redhat.com> |
DRI interface changes and DRI2 direct rendering support.
Add DRI2 direct rendering support to libGL and add DRI2 client side
protocol code. Extend the GLX 1.3 create drawable functions in
glx_pbuffer.c to call into the DRI driver when possible.
Introduce __DRIconfig, opaque struct that represents a DRI driver
configuration. Get's rid of the open coded __GLcontextModes in the
DRI driver interface and the context modes create and destroy
functions that the loader was requires to provide. glcore.h is no
longer part of the DRI driver interface. The DRI config is GL binding
agnostic, that is, not specific to GLX, EGL or other bindings.
The core API is now also an extension, and the driver exports a list
of extensions as the symbol __driDriverExtensions, which the loader
must dlsym() for. The list of extension will always include the DRI
core extension, which allows creating and manipulating DRI screens,
drawables and contexts. The DRI legacy extension, when available,
provides alternative entry points for creating the DRI objects that
work with the XF86DRI infrastructure.
Change DRI2 client code to not use drm drawables or contexts. We
never used drm_drawable_t's and the only use for drm_context_t was as
a unique identifier when taking the lock. We now just allocate a
unique lock ID out of the DRILock sarea block. Once we get rid of the
lock entirely, we can drop this hack.
Change the interface between dri_util.c and the drivers, so that the
drivers now export the DriverAPI struct as driDriverAPI instead of the
InitScreen entry point. This lets us avoid dlsym()'ing for the DRI2
init screen function to see if DRI2 is supported by the driver.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 180b41594c669574355b54ceb2c2ff96889bf336 |
|
10-Mar-2008 |
Kristian Høgsberg <krh@sasori.boston.redhat.com> |
DRI2: Drop DriverAPI.UpdateBuffer.
__dri2ParseEvents() would determine the kind of event, but then call
UpdateBuffer() in either case, and UpdateBuffer() would then have to
figure that out again to dispatch to HandleBufferAttach() or
HandleDrawableConfig(). Pretty pointless.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| fe91c05b5494b889c8adda77ff562712116d2e59 |
|
05-Mar-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Add a driconf option to cache freed buffer objects for reuse.
This is defaulted off as it has potentially large memory costs for a modest
performance gain. Ideally we will improve DRM performance to the point where
this optimization is not worth the memory cost in any case, or find some
middle ground in caching only limited numbers of certain buffers. For now,
this provides a modest 4% improvement in openarena on GM965 and 10% in openarena
on GM945.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 6cb3f5c4d8618a14bb7ad1d9df10ed7e648a7b2b |
|
28-Feb-2008 |
Kristian Høgsberg <krh@redhat.com> |
Use __DRIextension mechanism providing loader functionality to the driver.
Instead of passing in a fixed struct, the loader now passes in a list
of __DRIextension structs, to advertise the functionality it can provide
to the driver. Each extension is individually versioned and can be
extended or phased out as the interface develops.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 16242a8007f41ab63f9a28bb9a750857c8cdb8af |
|
26-Feb-2008 |
Kristian Høgsberg <krh@redhat.com> |
Reduce the versioning madness required to create a DRI2 screen.
Right now the DRI2 screen constructor takes 3 different versions:
DRI, DDX and DRM. This is mostly useless, though:
DRI: The DRI driver doesn't actually care about the DRI protocol,
it only talks to the loader, which in turn speaks DRI protocol. Thus,
the DRI protocol version is of not interest to the DRI driver, but it
needs to know what functionality the loader provides. At this point
that's reflected in the __DRIinterfaceMethods struct and the
internal_version integer.
DDX: The DDX version number is essentially used to track extensions
to the SAREA. With DRI2 the SAREA consists of a number of versioned,
self-describing blocks, so the DDX version is no longer interesting.
DRM: We have the fd, lets just ask the kernel ourselves.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 60c0f09abb9421de359cd92e094a943d650fc7fa |
|
27-Feb-2008 |
Kristian Høgsberg <krh@redhat.com> |
intel: Always use intelInitExtensions() for initializing extensions.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 6e8d21d72f35767e07081a8bee4323aaaf5e2aae |
|
25-Feb-2008 |
Kristian Høgsberg <krh@redhat.com> |
Remove GetMSC DriverAPI function.
The DriverAPI is internal to the DRI drivers and GetDrawableMSC
obsoletes GetMSC. Also, since the DRI driver interface has not yet
been released, just drop the getMSC function from the DRI interface
instead using the ABI preserving version mechanism.
Finally, using void pointer privates in the DRI interface is not allowed,
always pass the actual types around (__DRIdrawable in this case) to
enhance type safety and readability of the code.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| b49a8f805aec057d9d0b039531b373b6bd8330e2 |
|
25-Feb-2008 |
Kristian Høgsberg <krh@redhat.com> |
Remove now unused setTexOffset from __DriverAPIRec.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 1c718c0d78cf4eae9e02b03a0abbec384db948a6 |
|
22-Feb-2008 |
Alan Hourihane <alanh@tungstengraphics.com> |
Use drm_i915_sarea instead of drmI830Sarea and remove i830_common.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 19420e6c2592e8a31e2ead4bccebc1a9ccca52b1 |
|
15-Feb-2008 |
Eric Anholt <eric@anholt.net> |
[915] Revert broken context creation change from IS_915 commit.
The IS_945 case was left to fall through to the 830 case, along with the
not-recognized-at-all case, making that dead code.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| cf0d91ae1d627381b632de63e5cb85494b277eb4 |
|
15-Feb-2008 |
Adam Jackson <ajax@redhat.com> |
Add IS_915(), simplify IS_9XX() a bit.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 6d48779c7e5c9002d1bec4b1266ca05a474218ef |
|
15-Feb-2008 |
Kristian Høgsberg <krh@redhat.com> |
Add TTM buffer object based texture from pixmap implementation.
Currently only implemented for intel hw.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| c5c73c1b605611faf0f06df9b5d08d8984388238 |
|
21-Jan-2008 |
Kristian Høgsberg <krh@temari.boston.redhat.com> |
Hook up i915 driver to new DRI2 infrastructure.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 85063f14ea431b586d710f249563fc73481552c7 |
|
14-Feb-2008 |
Eric Anholt <eric@anholt.net> |
[965] Fix ARB_occlusion_query from intel_screen.c merge.
It wasn't being initialized at screen setup, so we were getting stub
entrypoints even though it was exposed as enabled. Fixes arbocclude mesa demo.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 46eb02b60920a920b782bacb15f01b44e18f888d |
|
22-Jan-2008 |
Kristian Høgsberg <krh@temari.boston.redhat.com> |
[intel] Clean up references to screen buffer metrics.
The screen wide info such as pitch and cpp are obsoleted by the FBO
changes, so clean up the last few references to those, except for
setting up the legacy screen regions.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| a0e453a5eca7ed4b57a7f4c1e418d368815e3957 |
|
17-Jan-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Make the no_rast option be standard driconf instead of INTEL_NO_RAST.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| e131c46b20241737ceba4856dbe01dcca6dd2c03 |
|
09-Jan-2008 |
Kristian Høgsberg <krh@temari.boston.redhat.com> |
[intel] Simplify intelCreateBuffer() a bit.
Drop a bunch of unused arguments from intel_create_renderbuffer() and
introduce intel_renderbuffer_set_region() to set the region for
a renderbuffer.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 24e7e457680d700e986fd0b0e0f046fadf67caf4 |
|
10-Jan-2008 |
Kristian Høgsberg <krh@temari.boston.redhat.com> |
Factor out code to do the DRM_I830_GETPARAM ioctl.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| bea6b5fe5aa3138cec8d057766ae48da4aa57dee |
|
20-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[965] Enable EXT_framebuffer_object.
To do so, merge the remainnig necessary code from the buffers, blit, span, and
screen code to shared, and replace it with those.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| fcd1e9dad6949e02380593a166432dbac311c80e |
|
20-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[i915] Move meta_draw_quad into the vtbl with other meta operations.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 7c71ef3a3d0cf2620525f468960cdc76a0fb0d33 |
|
12-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Move bufmgr back to context instead of screen, fixing glthreads.
Putting the bufmgr in the screen is not thread-safe since the emit_reloc
changes. It also led to a significant performance hit from pthread usage
for the attempted thread-safety (up to 12% of a cpu spent on refcounting
protection in single-threaded 965). The motivation had been to allow
multi-context bufmgr sharing in classic mode, but it wasn't worth the cost.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| f00a64999c197e6a96e65fd00f64224a6f22c9fa |
|
17-Nov-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Add 965 support to shared intel_blit.c
This requires that regions grow a marker of whether they are tiled or not,
because fence (surface) registers are ignored by the 965 2D engine.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 9b461d4d029497dd6f71e60220849e1b66bb8cf5 |
|
17-Nov-2007 |
Eric Anholt <eric@anholt.net> |
[i915] Pass static region names in so debugging says more than "static region".
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 9724dc1ac7ddd6f547a8aa6d57fa51ed1040db3a |
|
10-Nov-2007 |
Eric Anholt <eric@anholt.net> |
[i915] Remove old frontbuffer rotation hack.
This was replaced in previous releases of xserver/dri/libGL by reporting the
damage to the frontbuffer so that the server and driver could handle it
appropriately.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 38c616260a4c14bf5a1d7831e6349c3e8817d14b |
|
08-Nov-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Initialize a depth buffer if the visual has depth 24 but no stencil.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 77a5bcaff43df8d54e0e0ef833726e4b41d7eb36 |
|
07-Nov-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Move over files that will be shared with 965-fbo work.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|