| 507e71e45a2e46c6e01423ab00948a72f435396c |
|
18-Nov-2011 |
Eric Anholt <eric@anholt.net> |
i965: Add support for GL_ARB_depth_buffer_float under 3.0 override.
This is not exposed generally yet because some of the swrast paths hit
in piglit (drawpixels, copypixels, blit) aren't yet converted to
MapRenderbuffer.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| 0a3c895f341ae458b09dcdc9cbd674600366a925 |
|
01-Dec-2011 |
Brian Paul <brianp@vmware.com> |
mesa: rename MESA_FORMAT_RG88 to MESA_FORMAT_GR88
To better reflect the component ordering and be consistent with other
format names.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| b5444a6ebd48a2bf4c258be98aac831636164e10 |
|
08-Nov-2011 |
Eric Anholt <eric@anholt.net> |
intel: Don't _mesa_problem when asked for an RB of a texturing-only type.
We want to be able to support some formats for texturing that we can't
render to, which means that some choices for RenderbufferStorage end
up being incomplete (for example, L8 currently). For these, where we
don't render to them, we don't want to have to make up an rb->DataType
that's only used for GetRow()/PutRow().
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| b5c847c7ca06823af3b72324056a2e478caca70b |
|
23-May-2011 |
Chad Versace <chad@chad-versace.us> |
intel: Change supported texture formats for separate stencil
When hardware supports separate stencil, enable support for separate
depth/stencil texture formats in the table
intel_context.ctx.TextureFormatsSupported. If the hardware must use
separate stencil, then disable support for combined depth/stencil formats.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| 87478cd6e3e6349abc2688b390f8845d1e21af3d |
|
15-Apr-2011 |
Eric Anholt <eric@anholt.net> |
intel: Add support for ARB_texture_float.
For 1 and 2-channel formats the hardware only supports rendering to R
and RG. To do I and L render targets we just call them R and
everything works out. For A, we would need to rewrite the CC to do
the alpha channel's blending on color instead, and send the fragment
alpha down the red channel. For LA, there doesn't seem to be any
hope, because we can't do independent color/alpha blending while
treating the LA surface as RG.
Reviewed-by: Brian Paul <brianp@vmware.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| dad95c112f09b9978d71ababe80c4e34121d49f0 |
|
17-Apr-2011 |
Eric Anholt <eric@anholt.net> |
intel: Add I8 and L8 to intel_mesa_format_to_rb_datatype().
Fixes warnings in fbo-storage-formats.
Reviewed-by: Brian Paul <brianp@vmware.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| 5dbb856e960f9448ec4e322f936f5f6763ee77e2 |
|
04-Jan-2011 |
Eric Anholt <eric@anholt.net> |
intel: Merge our choosetexformat fallbacks into core.
We now share the type/format -> MESA_FORMAT_* mappings with software
mesa, and the core supports most of the fallbacks hardware drivers
will want.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| e339b669a14f37698b842c0c51c1f5e4001ef12f |
|
10-Dec-2010 |
Eric Anholt <eric@anholt.net> |
intel: Add a couple of helper functions to reduce rb code duplication.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| b4e8ec3a57c28c0881fb5b595116f95b8cbe3f02 |
|
09-Dec-2010 |
Eric Anholt <eric@anholt.net> |
intel: Use plain R8 and RG8 for COMPRESSED_RED and COMPRESSED_RG.
Fixes texture-rg.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| f9995b30756140724f41daf963fa06167912be7f |
|
12-Oct-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Drop GLcontext typedef and use struct gl_context instead
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| c77cd9ec10f7c6ad2927740e15900591d1ff388a |
|
20-Nov-2009 |
Ian Romanick <ian.d.romanick@intel.com> |
i965: Enable GL_ARB_texture_rg
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| be9276d91299e36a8c4371a87d75c9cacaf995f2 |
|
29-Jul-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Don't depend on context config values when picking texture formats
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| f0ff214bee64a705d3ef6610e9dc25bc1a46a460 |
|
04-Jun-2010 |
Eric Anholt <eric@anholt.net> |
i915: Don't use XRGB8888 on 830 and 845.
The support for XRGB8888 appeared in the 855 and 865, and this format
is reserved on 830/845. This should fix a regression from
b4a6169412819cc3a027c6a118f0537911145a30 that caused hangs in etracer
on 845s.
Bug #26557.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| 18a6e5ee73c5cef283c6bef906e5f8e4f60d4000 |
|
04-Jun-2010 |
Eric Anholt <eric@anholt.net> |
intel: Fix intel_compressed_num_bytes for FXT1 after I broke it.
Fixes piglit fxt1-teximage since
7554b83a21bd62b20df5a7327b69f08108ac9ab6, and also OGLC tests that hit
FXT1 with a million other things.
Bug #28184.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| 7554b83a21bd62b20df5a7327b69f08108ac9ab6 |
|
13-May-2010 |
Eric Anholt <eric@anholt.net> |
intel: Handle arbitrary compressed formats in intel_compressed_num_bytes.
Note that we don't support arbitrary block size for compressed quite
yet -- block height of 4 is hard-coded all over the place.
Bug #27098 (srgb dxt1 producing a bytes per pixel of 0).
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| c6e26d76c7f59b51be00c960112c85ad4b3d2334 |
|
31-Jan-2010 |
Vinson Lee <vlee@vmware.com> |
intel: Remove unnecessary headers.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| 0b87f143c466f7e5bd730895ee29f1cd20a68f9b |
|
17-Dec-2009 |
Eric Anholt <eric@anholt.net> |
intel: Replace IS_G4X() across the driver with context structure usage.
Saves ~2KB of code.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| b4a6169412819cc3a027c6a118f0537911145a30 |
|
09-Dec-2009 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Make RGB textures use XRGB8888
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| fdfbae3381553fc93202560abe3b41b4d543f0bf |
|
17-Nov-2009 |
Ian Romanick <ian.d.romanick@intel.com> |
i965: Use MESA_FORMAT_AL1616 when appropriate
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| 4a253431abf43a0638afb43605b44a8742b72a60 |
|
30-Oct-2009 |
Brian Paul <brianp@vmware.com> |
intel: update intel_create_renderbuffer(format), add XRGB support
Pass a gl_format to intel_create_renderbuffer() instead of GLenum.
Add cases for MESA_FORMAT_XRGB8888 textures and renderbuffers.
However, we don't yet create any renderbuffers or textures with that
format. It seems the default alpha value is zero instead of one.
Need to investigate that first.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| 68d94a608a6d46156a567b8f0e011ac58054975e |
|
22-Oct-2009 |
Brian Paul <brianp@vmware.com> |
intel: use MESA_FORMAT_S8_Z24 format and avoid z24s8/s8z24 conversions
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| 45e76d2665b38ba3787548310efc59e969124c01 |
|
09-Oct-2009 |
Brian Paul <brianp@vmware.com> |
mesa: remove a bunch of gl_renderbuffer fields
_ActualFormat is replaced by Format (MESA_FORMAT_x).
ColorEncoding, ComponentType, RedBits, GreenBits, BlueBits, etc. are
all replaced by MESA_FORMAT_x queries.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| 3e34a2a2b97e7c93955deedb7c12b73bccd6662d |
|
06-Oct-2009 |
Brian Paul <brianp@vmware.com> |
drivers: don't include texformat.h
And remove other unneeded #includes while we're at it.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| 1f7c914ad0beea8a29c1a171c7cd1a12f2efe0fa |
|
01-Oct-2009 |
Brian Paul <brianp@vmware.com> |
mesa: replace gl_texture_format with gl_format
Now gl_texture_image::TexFormat is a simple MESA_FORMAT_x enum.
ctx->Driver.ChooseTexture format also returns a MESA_FORMAT_x.
gl_texture_format will go away next.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| a693a2998c996f063edec8a83a4f6a175f39c471 |
|
28-Mar-2009 |
Roland Scheidegger <sroland@vmware.com> |
i965: srgb texture fixes
i965 can either do SRGBA8_REV format or SARGB8 format, but not SRGBA8.
Could add SRGBA8_REV support to mesa, but simply use SARGB8 for now.
While here, also add true srgb luminance / luminance_alpha support -
unfortunately the published docs fail to mention which asics support
this, tested on g43 so assume this works on any g4x.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| 79e2df63af4d231a1223887e79a819b3baac9a6c |
|
27-Mar-2009 |
Roland Scheidegger <sroland@vmware.com> |
i965: add support for signed rgba texture format
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| 3327cc64e7fdc13d3843ccb17763f68dd381185f |
|
12-Mar-2009 |
Roland Scheidegger <sroland@vmware.com> |
i965: add support for ATI_envmap_bumpmap
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| 645f220710923f72e80281fa75e577e133b5a53c |
|
27-Feb-2009 |
Brian Paul <brianp@vmware.com> |
intel: updated comment, some debug code (disabled)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| b2e09910f65ae2c8c43c0441955aa262a8946ef3 |
|
04-Feb-2009 |
Eric Anholt <eric@anholt.net> |
intel: Fix fbo_firecube regression with FBconfigs change.
By selecting a 4444 texture format due to a bad test, we hit the
intel_update_wrapper error path, and despite the appearance of error handling
in it and its callers, the desired behavior (software fallback) doesn't occur.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| 947d1c5b2a70c0eafa4c408b47607574a2908468 |
|
15-Jan-2009 |
Brian Paul <brianp@vmware.com> |
i965: asst. fixes, work-arounds for FBOs and render to texture
OpenGL allows mixing and matching depth and stencil renderbuffers in
framebuffer objects while the hardware really only supports interleaved
depth/stencil buffers. This makes for some tricky buffer management.
An extra wrinkle is the situation where the user allocates a 16bpp depth
texture or renderbuffer then tries to render to it along with a stencil
buffer. We'd have to promote the 16bpp Z values to 24-bit Z values and
mix in the stencil values to setup the depth/stencil renderbuffer.
There's no support for that now, so always allocate 32bpp depth textures/
renderbuffers for now.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| ecadb51bbcb972a79f3ed79e65a7986b9396e757 |
|
18-Sep-2008 |
Brian Paul <brian.paul@tungstengraphics.com> |
mesa: added "main/" prefix to includes, remove some -I paths from Makefile.template
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| 0adfd1021035e90995a25ec5f20b736e55075d92 |
|
04-Sep-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
intel: Fix depth_stencil texture.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| 46eb02b60920a920b782bacb15f01b44e18f888d |
|
22-Jan-2008 |
Kristian Høgsberg <krh@temari.boston.redhat.com> |
[intel] Clean up references to screen buffer metrics.
The screen wide info such as pitch and cpp are obsoleted by the FBO
changes, so clean up the last few references to those, except for
setting up the legacy screen regions.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| 5ad260246bbcd3f40f9f7f64fac82f1fb2aa3efb |
|
12-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[965] Bug #13600: Fix assertion failure with SRGB textures.
I broke this with cherry-pick resolving on
93c98a466947570e0589b662df49095b2f4bc43c.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|
| 77a5bcaff43df8d54e0e0ef833726e4b41d7eb36 |
|
07-Nov-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Move over files that will be shared with 965-fbo work.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
|