Lines Matching defs:AMDGPUInstrInfo
1 //===-- AMDGPUInstrInfo.cpp - Base class for AMD GPU InstrInfo ------------===//
15 #include "AMDGPUInstrInfo.h"
29 AMDGPUInstrInfo::AMDGPUInstrInfo(TargetMachine &tm)
32 const AMDGPURegisterInfo &AMDGPUInstrInfo::getRegisterInfo() const {
36 bool AMDGPUInstrInfo::isCoalescableExtInstr(const MachineInstr &MI,
43 unsigned AMDGPUInstrInfo::isLoadFromStackSlot(const MachineInstr *MI,
49 unsigned AMDGPUInstrInfo::isLoadFromStackSlotPostFE(const MachineInstr *MI,
55 bool AMDGPUInstrInfo::hasLoadFromStackSlot(const MachineInstr *MI,
61 unsigned AMDGPUInstrInfo::isStoreFromStackSlot(const MachineInstr *MI,
66 unsigned AMDGPUInstrInfo::isStoreFromStackSlotPostFE(const MachineInstr *MI,
71 bool AMDGPUInstrInfo::hasStoreFromStackSlot(const MachineInstr *MI,
79 AMDGPUInstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
85 bool AMDGPUInstrInfo::getNextBranchInstr(MachineBasicBlock::iterator &iter,
122 AMDGPUInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
132 AMDGPUInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
141 AMDGPUInstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
149 AMDGPUInstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
157 AMDGPUInstrInfo::canFoldMemoryOperand(const MachineInstr *MI,
164 AMDGPUInstrInfo::unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI,
173 AMDGPUInstrInfo::unfoldMemoryOperand(SelectionDAG &DAG, SDNode *N,
180 AMDGPUInstrInfo::getOpcodeAfterMemoryUnfold(unsigned Opc,
187 bool AMDGPUInstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
199 AMDGPUInstrInfo::ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond)
204 void AMDGPUInstrInfo::insertNoop(MachineBasicBlock &MBB,
209 bool AMDGPUInstrInfo::isPredicated(const MachineInstr *MI) const {
214 AMDGPUInstrInfo::SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
221 bool AMDGPUInstrInfo::DefinesPredicate(MachineInstr *MI,
227 bool AMDGPUInstrInfo::isPredicable(MachineInstr *MI) const {
233 AMDGPUInstrInfo::isSafeToMoveRegClassDefs(const TargetRegisterClass *RC) const {
238 void AMDGPUInstrInfo::convertToISA(MachineInstr & MI, MachineFunction &MF,