Cross Reference: /external/chromium_org/v8/src/mips64/assembler-mips64.cc

Lines Matching refs:instr
197   Instr* instr = reinterpret_cast<Instr*>(instructions);
199     *(pc + i) = *(instr + i);
335 Register Assembler::GetRtReg(Instr instr) {
337   rt.code_ = (instr & kRtFieldMask) >> kRtShift;
342 Register Assembler::GetRsReg(Instr instr) {
344   rs.code_ = (instr & kRsFieldMask) >> kRsShift;
349 Register Assembler::GetRdReg(Instr instr) {
351   rd.code_ = (instr & kRdFieldMask) >> kRdShift;
356 uint32_t Assembler::GetRt(Instr instr) {
357   return (instr & kRtFieldMask) >> kRtShift;
361 uint32_t Assembler::GetRtField(Instr instr) {
362   return instr & kRtFieldMask;
366 uint32_t Assembler::GetRs(Instr instr) {
367   return (instr & kRsFieldMask) >> kRsShift;
371 uint32_t Assembler::GetRsField(Instr instr) {
372   return instr & kRsFieldMask;
376 uint32_t Assembler::GetRd(Instr instr) {
377   return  (instr & kRdFieldMask) >> kRdShift;
381 uint32_t Assembler::GetRdField(Instr instr) {
382   return  instr & kRdFieldMask;
386 uint32_t Assembler::GetSa(Instr instr) {
387   return (instr & kSaFieldMask) >> kSaShift;
391 uint32_t Assembler::GetSaField(Instr instr) {
392   return instr & kSaFieldMask;
396 uint32_t Assembler::GetOpcodeField(Instr instr) {
397   return instr & kOpcodeMask;
401 uint32_t Assembler::GetFunction(Instr instr) {
402   return (instr & kFunctionFieldMask) >> kFunctionShift;
406 uint32_t Assembler::GetFunctionField(Instr instr) {
407   return instr & kFunctionFieldMask;
411 uint32_t Assembler::GetImmediate16(Instr instr) {
412   return instr & kImm16Mask;
416 uint32_t Assembler::GetLabelConst(Instr instr) {
417   return instr & ~kImm16Mask;
421 bool Assembler::IsPop(Instr instr) {
422   return (instr & ~kRtMask) == kPopRegPattern;
426 bool Assembler::IsPush(Instr instr) {
427   return (instr & ~kRtMask) == kPushRegPattern;
431 bool Assembler::IsSwRegFpOffset(Instr instr) {
432   return ((instr & kLwSwInstrTypeMask) == kSwRegFpOffsetPattern);
436 bool Assembler::IsLwRegFpOffset(Instr instr) {
437   return ((instr & kLwSwInstrTypeMask) == kLwRegFpOffsetPattern);
441 bool Assembler::IsSwRegFpNegOffset(Instr instr) {
442   return ((instr & (kLwSwInstrTypeMask | kNegOffset)) ==
447 bool Assembler::IsLwRegFpNegOffset(Instr instr) {
448   return ((instr & (kLwSwInstrTypeMask | kNegOffset)) ==
473 bool Assembler::IsBranch(Instr instr) {
474   uint32_t opcode   = GetOpcodeField(instr);
475   uint32_t rt_field = GetRtField(instr);
476   uint32_t rs_field = GetRsField(instr);
494 bool Assembler::IsEmittedConstant(Instr instr) {
495   uint32_t label_constant = GetLabelConst(instr);
500 bool Assembler::IsBeq(Instr instr) {
501   return GetOpcodeField(instr) == BEQ;
505 bool Assembler::IsBne(Instr instr) {
506   return GetOpcodeField(instr) == BNE;
510 bool Assembler::IsJump(Instr instr) {
511   uint32_t opcode   = GetOpcodeField(instr);
512   uint32_t rt_field = GetRtField(instr);
513   uint32_t rd_field = GetRdField(instr);
514   uint32_t function_field = GetFunctionField(instr);
522 bool Assembler::IsJ(Instr instr) {
523   uint32_t opcode = GetOpcodeField(instr);
529 bool Assembler::IsJal(Instr instr) {
530   return GetOpcodeField(instr) == JAL;
534 bool Assembler::IsJr(Instr instr) {
535   return GetOpcodeField(instr) == SPECIAL && GetFunctionField(instr) == JR;
539 bool Assembler::IsJalr(Instr instr) {
540   return GetOpcodeField(instr) == SPECIAL && GetFunctionField(instr) == JALR;
544 bool Assembler::IsLui(Instr instr) {
545   uint32_t opcode = GetOpcodeField(instr);
551 bool Assembler::IsOri(Instr instr) {
552   uint32_t opcode = GetOpcodeField(instr);
558 bool Assembler::IsNop(Instr instr, unsigned int type) {
561   uint32_t opcode = GetOpcodeField(instr);
562   uint32_t function = GetFunctionField(instr);
563   uint32_t rt = GetRt(instr);
564   uint32_t rd = GetRd(instr);
565   uint32_t sa = GetSa(instr);
582 int32_t Assembler::GetBranchOffset(Instr instr) {
583   DCHECK(IsBranch(instr));
584   return (static_cast<int16_t>(instr & kImm16Mask)) << 2;
588 bool Assembler::IsLw(Instr instr) {
589   return ((instr & kOpcodeMask) == LW);
593 int16_t Assembler::GetLwOffset(Instr instr) {
594   DCHECK(IsLw(instr));
595   return ((instr & kImm16Mask));
599 Instr Assembler::SetLwOffset(Instr instr, int16_t offset) {
600   DCHECK(IsLw(instr));
603   Instr temp_instr = LW | (instr & kRsFieldMask) | (instr & kRtFieldMask)
610 bool Assembler::IsSw(Instr instr) {
611   return ((instr & kOpcodeMask) == SW);
615 Instr Assembler::SetSwOffset(Instr instr, int16_t offset) {
616   DCHECK(IsSw(instr));
617   return ((instr & ~kImm16Mask) | (offset & kImm16Mask));
621 bool Assembler::IsAddImmediate(Instr instr) {
622   return ((instr & kOpcodeMask) == ADDIU || (instr & kOpcodeMask) == DADDIU);
626 Instr Assembler::SetAddImmediateOffset(Instr instr, int16_t offset) {
627   DCHECK(IsAddImmediate(instr));
628   return ((instr & ~kImm16Mask) | (offset & kImm16Mask));
632 bool Assembler::IsAndImmediate(Instr instr) {
633   return GetOpcodeField(instr) == ANDI;
638   Instr instr = instr_at(pos);
639   if ((instr & ~kImm16Mask) == 0) {
641     if (instr == 0) {
644        int32_t imm18 =((instr & static_cast<int32_t>(kImm16Mask)) << 16) >> 14;
649   DCHECK(IsBranch(instr) || IsJ(instr) || IsLui(instr));
652   if (IsBranch(instr)) {
653     int32_t imm18 = ((instr & static_cast<int32_t>(kImm16Mask)) << 16) >> 14;
660   } else if (IsLui(instr)) {
684     int32_t imm28 = (instr & static_cast<int32_t>(kImm26Mask)) << 2;
700   Instr instr = instr_at(pos);
701   if ((instr & ~kImm16Mask) == 0) {
709   DCHECK(IsBranch(instr) || IsJ(instr) || IsLui(instr));
710   if (IsBranch(instr)) {
714     instr &= ~kImm16Mask;
718     instr_at_put(pos, instr | (imm16 & kImm16Mask));
719   } else if (IsLui(instr)) {
744     instr &= ~kImm26Mask;
748     instr_at_put(pos, instr | (imm26 & kImm26Mask));
763       Instr instr = instr_at(l.pos());
764       if ((instr & ~kImm16Mask) == 0) {
767         PrintF("%d\n", instr);
789     Instr instr = instr_at(fixup_pos);
790     if (IsBranch(instr)) {
803       DCHECK(IsJ(instr) || IsLui(instr) || IsEmittedConstant(instr));
857   Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift)
859   emit(instr);
870   Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift)
872   emit(instr);
883   Instr instr = opcode | fmt | (ft.code() << kFtShift) | (fs.code() << kFsShift)
885   emit(instr);
896   Instr instr = opcode | (fr.code() << kFrShift) | (ft.code() << kFtShift)
898   emit(instr);
909   Instr instr = opcode | fmt | (rt.code() << kRtShift)
911   emit(instr);
921   Instr instr =
923   emit(instr);
934   Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift)
936   emit(instr);
945   Instr instr = opcode | (rs.code() << kRsShift) | SF | (j & kImm16Mask);
946   emit(instr);
955   Instr instr = opcode | (rs.code() << kRsShift) | (ft.code() << kFtShift)
957   emit(instr);
965   Instr instr = opcode | address;
966   emit(instr);
1352   Instr instr = BEQZC | (rs.code() << kRsShift) | offset;
1353   emit(instr);
1367   Instr instr = BNEZC | (rs.code() << kRsShift) | offset;
1368   emit(instr);
1703   Instr instr = SPECIAL | (1 << kRsShift) | (rt.code() << kRtShift)
1705   emit(instr);
1713   Instr instr = SPECIAL | (rs.code() << kRsShift) | (rt.code() << kRtShift)
1715   emit(instr);
1741   Instr instr = SPECIAL | (1 << kRsShift) | (rt.code() << kRtShift)
1743   emit(instr);
1749   Instr instr = SPECIAL | (rs.code() << kRsShift) | (rt.code() << kRtShift)
1751   emit(instr);
2011   Instr instr = SPECIAL | TGE | rs.code() << kRsShift
2013   emit(instr);
2019   Instr instr = SPECIAL | TGEU | rs.code() << kRsShift
2021   emit(instr);
2027   Instr instr =
2029   emit(instr);
2035   Instr instr =
2038   emit(instr);
2044   Instr instr =
2046   emit(instr);
2052   Instr instr =
2054   emit(instr);
2122   Instr instr = COP1 | fmt << kRsShift | ft.code() << kFtShift |
2124   emit(instr);
2142   Instr instr = COP1 | fmt << kRsShift | ft.code() << kFtShift |
2144   emit(instr);
2162   Instr instr = COP1 | fmt << kRsShift | ft.code() << kFtShift |
2164   emit(instr);
2171     // Clz instr requires same GPR number in 'rd' and 'rt' fields.
2181   // Ins instr has 'rt' field as dest, and two uint5: msb, lsb.
2189   // Ext instr has 'rt' field as dest, and two uint5: msb, lsb.
2197   Instr instr = PREF | (rs.rm().code() << kRsShift) | (hint << kRtShift)
2199   emit(instr);
2498   Instr instr = COP1 | fmt | ft.code() << kFtShift |
2500   emit(instr);
2506   Instr instr = COP1 | BC1EQZ | ft.code() << kFtShift | (offset & kImm16Mask);
2507   emit(instr);
2513   Instr instr = COP1 | BC1NEZ | ft.code() << kFtShift | (offset & kImm16Mask);
2514   emit(instr);
2524   Instr instr = COP1 | fmt | ft.code() << kFtShift | fs.code() << kFsShift
2526   emit(instr);
2541   Instr instr = COP1 | BC1 | cc << 18 | 0 << 16 | (offset & kImm16Mask);
2542   emit(instr);
2548   Instr instr = COP1 | BC1 | cc << 18 | 1 << 16 | (offset & kImm16Mask);
2549   emit(instr);
2577   Instr instr = instr_at(pc);
2578   DCHECK(IsJ(instr) || IsLui(instr));
2579   if (IsLui(instr)) {
2610     uint32_t imm28 = (instr & static_cast<int32_t>(kImm26Mask)) << 2;
2619     instr &= ~kImm26Mask;
2623     instr_at_put(pc, instr | (imm26 & kImm26Mask));