Lines Matching defs:getDecl
199 if (getDecl()->isBitField())
232 const ObjCIvarDecl *ObjCIvarRegion::getDecl() const {
237 return getDecl()->getType();
241 return QualType(getDecl()->getTypeForDecl(), 0);
333 VarRegion::ProfileRegion(ID, getDecl(), superRegion);
420 ProfileRegion(ID, getDecl(), isVirtual(), superRegion);
461 os << "code{" << getDecl()->getDeclName().getAsString() << '}';
490 os << "base{" << superRegion << ',' << getDecl()->getName() << '}';
503 os << superRegion << "->" << *getDecl();
507 os << "ivar{" << superRegion << ',' << *getDecl() << '}';
594 os << getDecl()->getName();
602 os << getDecl()->getName();
616 os << "." << getDecl()->getName();
625 os << "field " << "\'" << getDecl()->getName() << "'";
743 if (cast<DeclContext>(SFC->getDecl()) == DC)
755 if (VR->getDecl() == VD)
815 const Decl *STCD = STC->getDecl();
856 const BlockDecl *BD = BC->getDecl();
1122 const RecordDecl *D = RT->getDecl();
1262 if (!Child->isVirtuallyDerivedFrom(BOR->getDecl()))
1265 if (!isImmediateBase(Child, BOR->getDecl()))
1278 BaseOffset = Layout.getVBaseClassOffset(BOR->getDecl());
1280 BaseOffset = Layout.getBaseClassOffset(BOR->getDecl());
1318 const RecordDecl *RD = FR->getDecl()->getParent();
1337 if (FR->getDecl() == *FI)
1387 std::tie(I, E) = AC->getReferencedBlockVars(BC->getDecl());