Lines Matching refs:STI
62 const MCSubtargetInfo *STI = TheTarget->createMCSubtargetInfo(Triple, CPU,
64 if (!STI)
73 MCDisassembler *DisAsm = TheTarget->createMCDisassembler(*STI, *Ctx);
89 *MAI, *MII, *MRI, *STI);
96 STI, MII, Ctx, DisAsm, IP);
185 const MCSubtargetInfo *STI = DC->getSubtargetInfo();
186 InstrItineraryData IID = STI->getInstrItineraryForCPU(DC->getCPU());
204 const MCSubtargetInfo *STI = DC->getSubtargetInfo();
205 const MCSchedModel *SCModel = STI->getSchedModel();
228 const MCWriteLatencyEntry *WLEntry = STI->getWriteLatencyEntry(SCDesc,
334 const MCSubtargetInfo *STI = DC->getSubtargetInfo();
338 AsmPrinterVariant, *MAI, *MII, *MRI, *STI);