Cross Reference: /external/llvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp

Lines Matching refs:MRI
65   MachineRegisterInfo *MRI;
101                     const MachineRegisterInfo *MRI) {
105     return MRI->getRegClass(Reg)->hasSuperClassEq(&AArch64::GPR64RegClass);
110                     const MachineRegisterInfo *MRI) {
112     return (MRI->getRegClass(Reg)->hasSuperClassEq(&AArch64::FPR64RegClass) &&
114            (MRI->getRegClass(Reg)->hasSuperClassEq(&AArch64::FPR128RegClass) &&
124                                const MachineRegisterInfo *MRI,
141                 MRI) &&
142         isGPR64(MI->getOperand(1).getReg(), MI->getOperand(1).getSubReg(), MRI))
145                 MRI) &&
147                 MRI)) {
198   if (!MRI->def_empty(OrigSrc0)) {
200         MRI->def_instr_begin(OrigSrc0);
201     assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!");
202     Src0 = getSrcFromCopy(&*Def, MRI, SubReg0);
208     if (Src0 && MRI->hasOneNonDBGUse(OrigSrc0))
211   if (!MRI->def_empty(OrigSrc1)) {
213         MRI->def_instr_begin(OrigSrc1);
214     assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!");
215     Src1 = getSrcFromCopy(&*Def, MRI, SubReg1);
220     if (Src1 && MRI->hasOneNonDBGUse(OrigSrc1))
232            Use = MRI->use_instr_nodbg_begin(Dst),
233            E = MRI->use_instr_nodbg_end();
236     if (getSrcFromCopy(&*Use, MRI, SubReg) || isTransformable(&*Use))
291   if (!MRI->def_empty(OrigSrc0)) {
293         MRI->def_instr_begin(OrigSrc0);
294     assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!");
295     Src0 = getSrcFromCopy(&*Def, MRI, SubReg0);
298     if (Src0 && MRI->hasOneNonDBGUse(OrigSrc0)) {
304   if (!MRI->def_empty(OrigSrc1)) {
306         MRI->def_instr_begin(OrigSrc1);
307     assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!");
308     Src1 = getSrcFromCopy(&*Def, MRI, SubReg1);
311     if (Src1 && MRI->hasOneNonDBGUse(OrigSrc1)) {
321     Src0 = MRI->createVirtualRegister(&AArch64::FPR64RegClass);
326     Src1 = MRI->createVirtualRegister(&AArch64::FPR64RegClass);
333   unsigned Dst = MRI->createVirtualRegister(&AArch64::FPR64RegClass);
373   MRI = &mf.getRegInfo();