Lines Matching refs:Tys
7430 EVT Tys[3] = { VT, MVT::i64, MVT::Other };
7431 SDVTList SDTys = DAG.getVTList(ArrayRef<EVT>(Tys, 3));
7554 EVT Tys[6];
7558 Tys[n] = VecTy;
7559 Tys[n++] = MVT::i64; // Type of write back register
7560 Tys[n] = MVT::Other; // Type of the chain
7561 SDVTList SDTys = DAG.getVTList(ArrayRef<EVT>(Tys, NumResultVecs + 2));
7957 Type *Tys[] = { Addr->getType() };
7960 Function *Ldxr = llvm::Intrinsic::getDeclaration(M, Int, Tys);
7991 Type *Tys[] = { Addr->getType() };
7992 Function *Stxr = Intrinsic::getDeclaration(M, Int, Tys);