Cross Reference: /external/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp

Lines Matching refs:KillSrc
1276     unsigned DestReg, unsigned SrcReg, bool KillSrc, unsigned Opcode,
1296     AddSubReg(MIB, SrcReg, Indices[SubReg], getKillRegState(KillSrc), TRI);
1303                                    bool KillSrc) const {
1324             .addReg(SrcReg, RegState::Implicit | getKillRegState(KillSrc));
1327             .addReg(SrcReg, getKillRegState(KillSrc))
1348             .addReg(SrcReg, RegState::Implicit | getKillRegState(KillSrc));
1353             .addReg(SrcReg, getKillRegState(KillSrc));
1364           .addReg(SrcReg, getKillRegState(KillSrc))
1374           .addReg(SrcReg, getKillRegState(KillSrc));
1384     copyPhysRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRv8i8,
1394     copyPhysRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRv8i8,
1403     copyPhysRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRv8i8,
1413     copyPhysRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRv16i8,
1423     copyPhysRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRv16i8,
1432     copyPhysRegTuple(MBB, I, DL, DestReg, SrcReg, KillSrc, AArch64::ORRv16i8,
1442           .addReg(SrcReg, getKillRegState(KillSrc));
1446         .addReg(SrcReg, getKillRegState(KillSrc))
1467           .addReg(SrcReg, getKillRegState(KillSrc));
1470           .addReg(SrcReg, getKillRegState(KillSrc));
1484           .addReg(SrcReg, getKillRegState(KillSrc));
1487           .addReg(SrcReg, getKillRegState(KillSrc));
1501           .addReg(SrcReg, getKillRegState(KillSrc));
1508           .addReg(SrcReg, getKillRegState(KillSrc));
1522           .addReg(SrcReg, getKillRegState(KillSrc));
1529           .addReg(SrcReg, getKillRegState(KillSrc));
1538         .addReg(SrcReg, getKillRegState(KillSrc));
1544         .addReg(SrcReg, getKillRegState(KillSrc));
1551         .addReg(SrcReg, getKillRegState(KillSrc));
1557         .addReg(SrcReg, getKillRegState(KillSrc));
1565       .addReg(SrcReg, getKillRegState(KillSrc))
1575       .addReg(AArch64::NZCV, RegState::Implicit | getKillRegState(KillSrc));