Cross Reference: /external/llvm/lib/Target/ARM/ARMCodeEmitter.cpp

Lines Matching defs:MachineInstr
27 #include "llvm/CodeGen/MachineInstr.h"
79     uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const;
87     void emitInstruction(const MachineInstr &MI);
93     void emitConstPoolInstruction(const MachineInstr &MI);
94     void emitMOVi32immInstruction(const MachineInstr &MI);
95     void emitMOVi2piecesInstruction(const MachineInstr &MI);
96     void emitLEApcrelJTInstruction(const MachineInstr &MI);
97     void emitPseudoMoveInstruction(const MachineInstr &MI);
99     void emitPseudoInstruction(const MachineInstr &MI);
100     unsigned getMachineSoRegOpValue(const MachineInstr &MI,
106     unsigned getAddrModeSBit(const MachineInstr &MI,
109     void emitDataProcessingInstruction(const MachineInstr &MI,
113     void emitLoadStoreInstruction(const MachineInstr &MI,
117     void emitMiscLoadStoreInstruction(const MachineInstr &MI,
120     void emitLoadStoreMultipleInstruction(const MachineInstr &MI);
122     void emitMulFrmInstruction(const MachineInstr &MI);
124     void emitExtendInstruction(const MachineInstr &MI);
126     void emitMiscArithInstruction(const MachineInstr &MI);
128     void emitSaturateInstruction(const MachineInstr &MI);
130     void emitBranchInstruction(const MachineInstr &MI);
134     void emitMiscBranchInstruction(const MachineInstr &MI);
136     void emitVFPArithInstruction(const MachineInstr &MI);
138     void emitVFPConversionInstruction(const MachineInstr &MI);
140     void emitVFPLoadStoreInstruction(const MachineInstr &MI);
142     void emitVFPLoadStoreMultipleInstruction(const MachineInstr &MI);
144     void emitNEONLaneInstruction(const MachineInstr &MI);
145     void emitNEONDupInstruction(const MachineInstr &MI);
146     void emitNEON1RegModImmInstruction(const MachineInstr &MI);
147     void emitNEON2RegInstruction(const MachineInstr &MI);
148     void emitNEON3RegInstruction(const MachineInstr &MI);
152     unsigned getMachineOpValue(const MachineInstr &MI,
154     unsigned getMachineOpValue(const MachineInstr &MI, unsigned OpIdx) const {
166     unsigned NEONThumb2DataIPostEncoder(const MachineInstr &MI, unsigned Val)
168     unsigned NEONThumb2LoadStorePostEncoder(const MachineInstr &MI,unsigned Val)
170     unsigned NEONThumb2DupPostEncoder(const MachineInstr &MI,unsigned Val)
172     unsigned NEONThumb2V8PostEncoder(const MachineInstr &MI,unsigned Val)
174     unsigned VFPThumb2PostEncoder(const MachineInstr&MI, unsigned Val)
176     unsigned getAdrLabelOpValue(const MachineInstr &MI, unsigned Op)
178     unsigned getThumbAdrLabelOpValue(const MachineInstr &MI, unsigned Op)
180     unsigned getThumbBLTargetOpValue(const MachineInstr &MI, unsigned Op)
182     unsigned getThumbBLXTargetOpValue(const MachineInstr &MI, unsigned Op)
184     unsigned getThumbBRTargetOpValue(const MachineInstr &MI, unsigned Op)
186     unsigned getThumbBCCTargetOpValue(const MachineInstr &MI, unsigned Op)
188     unsigned getThumbCBTargetOpValue(const MachineInstr &MI, unsigned Op)
190     unsigned getBranchTargetOpValue(const MachineInstr &MI, unsigned Op)
192     unsigned getUnconditionalBranchTargetOpValue(const MachineInstr &MI,
194     unsigned getARMBranchTargetOpValue(const MachineInstr &MI, unsigned Op)
196     unsigned getARMBLTargetOpValue(const MachineInstr &MI, unsigned Op)
198     unsigned getARMBLXTargetOpValue(const MachineInstr &MI, unsigned Op)
200     unsigned getCCOutOpValue(const MachineInstr &MI, unsigned Op)
202     unsigned getSOImmOpValue(const MachineInstr &MI, unsigned Op)
204     unsigned getT2SOImmOpValue(const MachineInstr &MI, unsigned Op)
206     unsigned getSORegRegOpValue(const MachineInstr &MI, unsigned Op)
208     unsigned getSORegImmOpValue(const MachineInstr &MI, unsigned Op)
210     unsigned getThumbAddrModeRegRegOpValue(const MachineInstr &MI, unsigned Op)
212     unsigned getT2AddrModeImm8OpValue(const MachineInstr &MI, unsigned Op)
214     unsigned getT2Imm8s4OpValue(const MachineInstr &MI, unsigned Op)
216     unsigned getT2AddrModeImm8s4OpValue(const MachineInstr &MI, unsigned Op)
218     unsigned getT2AddrModeImm0_1020s4OpValue(const MachineInstr &MI,unsigned Op)
220     unsigned getT2AddrModeImm8OffsetOpValue(const MachineInstr &MI, unsigned Op)
222     unsigned getT2AddrModeSORegOpValue(const MachineInstr &MI, unsigned Op)
224     unsigned getT2SORegOpValue(const MachineInstr &MI, unsigned Op)
226     unsigned getT2AdrLabelOpValue(const MachineInstr &MI, unsigned Op)
228     unsigned getAddrMode6AddressOpValue(const MachineInstr &MI, unsigned Op)
230     unsigned getAddrMode6OneLane32AddressOpValue(const MachineInstr &MI,
233     unsigned getAddrMode6DupAddressOpValue(const MachineInstr &MI, unsigned Op)
235     unsigned getAddrMode6OffsetOpValue(const MachineInstr &MI, unsigned Op)
237     unsigned getBitfieldInvertedMaskOpValue(const MachineInstr &MI,
239     uint32_t getLdStSORegOpValue(const MachineInstr &MI, unsigned OpIdx)
242     unsigned getAddrModeImm12OpValue(const MachineInstr &MI, unsigned Op)
263     unsigned getHiLo16ImmOpValue(const MachineInstr &MI, unsigned Op) const {
267     uint32_t getAddrMode2OffsetOpValue(const MachineInstr &MI, unsigned OpIdx)
269     uint32_t getPostIdxRegOpValue(const MachineInstr &MI, unsigned OpIdx)
271     uint32_t getAddrMode3OffsetOpValue(const MachineInstr &MI, unsigned OpIdx)
273     uint32_t getAddrMode3OpValue(const MachineInstr &MI, unsigned Op)
275     uint32_t getAddrModeThumbSPOpValue(const MachineInstr &MI, unsigned Op)
277     uint32_t getAddrModeISOpValue(const MachineInstr &MI, unsigned Op)
279     uint32_t getAddrModePCOpValue(const MachineInstr &MI, unsigned Op)
281     uint32_t getAddrMode5OpValue(const MachineInstr &MI, unsigned Op) const {
312     unsigned getNEONVcvtImm32OpValue(const MachineInstr &MI, unsigned Op)
315     unsigned getRegisterListOpValue(const MachineInstr &MI, unsigned Op)
318     unsigned getShiftRight8Imm(const MachineInstr &MI, unsigned Op)
320     unsigned getShiftRight16Imm(const MachineInstr &MI, unsigned Op)
322     unsigned getShiftRight32Imm(const MachineInstr &MI, unsigned Op)
324     unsigned getShiftRight64Imm(const MachineInstr &MI, unsigned Op)
330     unsigned getMovi32Value(const MachineInstr &MI,const MachineOperand &MO,
347     unsigned encodeVFPRd(const MachineInstr &MI, unsigned OpIdx) const;
348     unsigned encodeVFPRn(const MachineInstr &MI, unsigned OpIdx) const;
349     unsigned encodeVFPRm(const MachineInstr &MI, unsigned OpIdx) const;
350     unsigned encodeNEONRd(const MachineInstr &MI, unsigned OpIdx) const;
351     unsigned encodeNEONRn(const MachineInstr &MI, unsigned OpIdx) const;
352     unsigned encodeNEONRm(const MachineInstr &MI, unsigned OpIdx) const;
417 unsigned ARMCodeEmitter::getMovi32Value(const MachineInstr &MI,
442 unsigned ARMCodeEmitter::getMachineOpValue(const MachineInstr &MI,
529 void ARMCodeEmitter::emitInstruction(const MachineInstr &MI) {
622 void ARMCodeEmitter::emitConstPoolInstruction(const MachineInstr &MI) {
685 void ARMCodeEmitter::emitMOVi32immInstruction(const MachineInstr &MI) {
721 void ARMCodeEmitter::emitMOVi2piecesInstruction(const MachineInstr &MI) {
763 void ARMCodeEmitter::emitLEApcrelJTInstruction(const MachineInstr &MI) {
790 void ARMCodeEmitter::emitPseudoMoveInstruction(const MachineInstr &MI) {
835 void ARMCodeEmitter::emitPseudoInstruction(const MachineInstr &MI) {
919 unsigned ARMCodeEmitter::getMachineSoRegOpValue(const MachineInstr &MI,
989 unsigned ARMCodeEmitter::getAddrModeSBit(const MachineInstr &MI,
999 void ARMCodeEmitter::emitDataProcessingInstruction(const MachineInstr &MI,
1097 void ARMCodeEmitter::emitLoadStoreInstruction(const MachineInstr &MI,
1176 void ARMCodeEmitter::emitMiscLoadStoreInstruction(const MachineInstr &MI,
1262 void ARMCodeEmitter::emitLoadStoreMultipleInstruction(const MachineInstr &MI) {
1302 void ARMCodeEmitter::emitMulFrmInstruction(const MachineInstr &MI) {
1339 void ARMCodeEmitter::emitExtendInstruction(const MachineInstr &MI) {
1376 void ARMCodeEmitter::emitMiscArithInstruction(const MachineInstr &MI) {
1425 void ARMCodeEmitter::emitSaturateInstruction(const MachineInstr &MI) {
1466 void ARMCodeEmitter::emitBranchInstruction(const MachineInstr &MI) {
1505 void ARMCodeEmitter::emitMiscBranchInstruction(const MachineInstr &MI) {
1544 unsigned ARMCodeEmitter::encodeVFPRd(const MachineInstr &MI,
1559 unsigned ARMCodeEmitter::encodeVFPRn(const MachineInstr &MI,
1574 unsigned ARMCodeEmitter::encodeVFPRm(const MachineInstr &MI,
1589 void ARMCodeEmitter::emitVFPArithInstruction(const MachineInstr &MI) {
1628 void ARMCodeEmitter::emitVFPConversionInstruction(const MachineInstr &MI) {
1684 void ARMCodeEmitter::emitVFPLoadStoreInstruction(const MachineInstr &MI) {
1719 ARMCodeEmitter::emitVFPLoadStoreMultipleInstruction(const MachineInstr &MI) {
1766 unsigned ARMCodeEmitter::encodeNEONRd(const MachineInstr &MI,
1776 unsigned ARMCodeEmitter::encodeNEONRn(const MachineInstr &MI,
1786 unsigned ARMCodeEmitter::encodeNEONRm(const MachineInstr &MI,
1805 void ARMCodeEmitter::emitNEONLaneInstruction(const MachineInstr &MI) {
1846 void ARMCodeEmitter::emitNEONDupInstruction(const MachineInstr &MI) {
1859 void ARMCodeEmitter::emitNEON1RegModImmInstruction(const MachineInstr &MI) {
1876 void ARMCodeEmitter::emitNEON2RegInstruction(const MachineInstr &MI) {
1891 void ARMCodeEmitter::emitNEON3RegInstruction(const MachineInstr &MI) {