Cross Reference: /external/llvm/lib/Target/ARM/ARMFrameLowering.cpp

Lines Matching refs:AddDefaultPred
305       AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVi16), ARM::R4)
338     AddDefaultCC(AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::t2SUBrr),
521       AddDefaultCC(AddDefaultPred(BuildMI(MBB, MBBI, dl,
532       AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), ARM::R4)
534       AddDefaultCC(AddDefaultPred(BuildMI(MBB, MBBI, dl,
538       AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), ARM::SP)
557       AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr),
634           AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr),
644           AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr),
850         AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(StmOpc), ARM::SP)
860       AddDefaultPred(MIB);
923         AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(LdmOpc), ARM::SP)
948       AddDefaultPred(MIB);
1008   AddDefaultCC(AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(Opc), ARM::R4)
1015   AddDefaultCC(AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(Opc), ARM::R4)
1026   MIB = AddDefaultPred(MIB);
1040     AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(ARM::VST1d64Qwb_fixed),
1058     AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(ARM::VST1d64Q))
1070     AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(ARM::VST1q64))
1080     AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(ARM::VSTRD))
1147   AddDefaultCC(AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(Opc), ARM::R4)
1157     AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(ARM::VLD1d64Qwb_fixed), NextReg)
1173     AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(ARM::VLD1d64Q), NextReg)
1184     AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(ARM::VLD1q64), SupReg)
1192     AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(ARM::VLDRD), NextReg)
1802     AddDefaultPred(BuildMI(PrevStackMBB, DL, TII.get(ARM::tPUSH)))
1805     AddDefaultPred(BuildMI(PrevStackMBB, DL, TII.get(ARM::STMDB_UPD))
1827     AddDefaultPred(BuildMI(McrMBB, DL, TII.get(ARM::tMOVr), ScratchReg1)
1830     AddDefaultPred(BuildMI(McrMBB, DL, TII.get(ARM::MOVr), ScratchReg1)
1836     AddDefaultPred(
1840     AddDefaultPred(BuildMI(McrMBB, DL, TII.get(ARM::SUBri), ScratchReg1)
1852     AddDefaultPred(BuildMI(GetMBB, DL, TII.get(ARM::tLDRpci), ScratchReg0)
1856     AddDefaultPred(BuildMI(GetMBB, DL, TII.get(ARM::tLDRi), ScratchReg0)
1861     AddDefaultPred(BuildMI(McrMBB, DL, TII.get(ARM::MRC), ScratchReg0)
1874     AddDefaultPred(BuildMI(GetMBB, DL, TII.get(ARM::LDRi12), ScratchReg0)
1881   AddDefaultPred(BuildMI(GetMBB, DL, TII.get(Opcode))
1899     AddDefaultPred(AddDefaultCC(BuildMI(AllocMBB, DL, TII.get(ARM::tMOVi8),
1902     AddDefaultPred(BuildMI(AllocMBB, DL, TII.get(ARM::MOVi), ScratchReg0)
1908     AddDefaultPred(
1912     AddDefaultPred(BuildMI(AllocMBB, DL, TII.get(ARM::MOVi), ScratchReg1)
1919     AddDefaultPred(BuildMI(AllocMBB, DL, TII.get(ARM::tPUSH)))
1922     AddDefaultPred(BuildMI(AllocMBB, DL, TII.get(ARM::STMDB_UPD))
1941     AddDefaultPred(BuildMI(AllocMBB, DL, TII.get(ARM::tBL)))
1951       AddDefaultPred(BuildMI(AllocMBB, DL, TII.get(ARM::tPOP)))
1953       AddDefaultPred(BuildMI(AllocMBB, DL, TII.get(ARM::tMOVr), ARM::LR)
1956       AddDefaultPred(BuildMI(AllocMBB, DL, TII.get(ARM::t2LDR_POST))
1963     AddDefaultPred(BuildMI(AllocMBB, DL, TII.get(ARM::LDMIA_UPD))
1974     AddDefaultPred(BuildMI(AllocMBB, DL, TII.get(ARM::tPOP)))
1978     AddDefaultPred(BuildMI(AllocMBB, DL, TII.get(ARM::LDMIA_UPD))
1992   AddDefaultPred(BuildMI(AllocMBB, DL, TII.get(Opcode)));
1997     AddDefaultPred(BuildMI(PostStackMBB, DL, TII.get(ARM::tPOP)))
2001     AddDefaultPred(BuildMI(PostStackMBB, DL, TII.get(ARM::LDMIA_UPD))