Cross Reference: /external/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp

Lines Matching defs:SelectVLDSTLane
230   /// SelectVLDSTLane - Select NEON load/store lane intrinsics.  NumVecs should
233   SDNode *SelectVLDSTLane(SDNode *N, bool IsLoad,
2050 SDNode *ARMDAGToDAGISel::SelectVLDSTLane(SDNode *N, bool IsLoad,
2888     return SelectVLDSTLane(N, true, true, 2, DOpcodes, QOpcodes);
2897     return SelectVLDSTLane(N, true, true, 3, DOpcodes, QOpcodes);
2906     return SelectVLDSTLane(N, true, true, 4, DOpcodes, QOpcodes);
2966     return SelectVLDSTLane(N, false, true, 2, DOpcodes, QOpcodes);
2975     return SelectVLDSTLane(N, false, true, 3, DOpcodes, QOpcodes);
2984     return SelectVLDSTLane(N, false, true, 4, DOpcodes, QOpcodes);
3144       return SelectVLDSTLane(N, true, false, 2, DOpcodes, QOpcodes);
3153       return SelectVLDSTLane(N, true, false, 3, DOpcodes, QOpcodes);
3162       return SelectVLDSTLane(N, true, false, 4, DOpcodes, QOpcodes);
3215       return SelectVLDSTLane(N, false, false, 2, DOpcodes, QOpcodes);
3224       return SelectVLDSTLane(N, false, false, 3, DOpcodes, QOpcodes);
3233       return SelectVLDSTLane(N, false, false, 4, DOpcodes, QOpcodes);