Cross Reference: /external/llvm/lib/Target/PowerPC/PPCISelLowering.cpp

Lines Matching defs:FP
238   // PowerPC wants to turn select_cc of FP into fsel when possible.
1143     assert(CN->getValueType(0) == MVT::f32 && "Only one legal FP vector type!");
2112 /// GetFPR - Get the set of FP registers that should be allocated for arguments,
2387     // FIXME 32-bit SVR4: We only need to save FP argument registers if CR bit 6
2966       // All FP arguments reserve stack space in the Darwin ABI.
3196     // When using the 32/64-bit SVR4 ABI there is no need to move the FP stack
3197     // slot as the FP is never overwritten.
3241     // Load the LR and FP stack slot for later adjusting.
3248     // When using the 32/64-bit SVR4 ABI there is no need to load the FP stack
3249     // slot as the FP is never overwritten.
4979   // Not FP? Not a fsel.
5102   // Convert the FP value to an int value through memory.
5208     SDValue FP = DAG.getNode(FCFOp, dl, FCFTy, Bits);
5211       FP = DAG.getNode(ISD::FP_ROUND, dl,
5212                        MVT::f32, FP, DAG.getIntPtrConstant(0));
5213     return FP;
5247            "i32->FP without LFIWAX supported only on PPC64");
5267   SDValue FP = DAG.getNode(FCFOp, dl, FCFTy, Ld);
5269     FP = DAG.getNode(ISD::FP_ROUND, dl, MVT::f32, FP, DAG.getIntPtrConstant(0));
5270   return FP;
5299   // Save FP Control Word to register
5306   // Save FP register to stack slot
5312   // Load FP Control Word from low 32 bits of stack slot.
6613   // Since FP is only updated here but NOT referenced, it's treated as GPR.
6614   unsigned FP  = (PVT == MVT::i64) ? PPC::X31 : PPC::R31;
6627   // Reload FP (the jumped-to function may not have had a
6631     MIB = BuildMI(*MBB, MI, DL, TII->get(PPC::LD), FP)
6635     MIB = BuildMI(*MBB, MI, DL, TII->get(PPC::LWZ), FP)
7241     // this entire sequence requires only one FP constant.
8834     FrameReg = isPPC64 ? PPC::FP8 : PPC::FP;