Lines Matching defs:reg
240 unsigned reg = MO.getReg();
241 if (reg == AMDGPU::VCC || reg == AMDGPU::VCC_LO ||
242 reg == AMDGPU::VCC_HI) {
247 switch (reg) {
255 if (AMDGPU::SReg_32RegClass.contains(reg)) {
258 } else if (AMDGPU::VReg_32RegClass.contains(reg)) {
261 } else if (AMDGPU::SReg_64RegClass.contains(reg)) {
264 } else if (AMDGPU::VReg_64RegClass.contains(reg)) {
267 } else if (AMDGPU::VReg_96RegClass.contains(reg)) {
270 } else if (AMDGPU::SReg_128RegClass.contains(reg)) {
273 } else if (AMDGPU::VReg_128RegClass.contains(reg)) {
276 } else if (AMDGPU::SReg_256RegClass.contains(reg)) {
279 } else if (AMDGPU::VReg_256RegClass.contains(reg)) {
282 } else if (AMDGPU::SReg_512RegClass.contains(reg)) {
285 } else if (AMDGPU::VReg_512RegClass.contains(reg)) {
291 unsigned hwReg = RI->getEncodingValue(reg) & 0xff;