Lines Matching refs:X86
1 //===-- X86AsmBackend.cpp - X86 Assembler Backend -------------------------===//
36 cl::desc("Disable relaxation of arithmetic instruction for X86"));
51 case X86::reloc_riprel_4byte:
52 case X86::reloc_riprel_4byte_movq_load:
53 case X86::reloc_signed_4byte:
54 case X86::reloc_global_offset_table:
61 case X86::reloc_global_offset_table8:
90 return X86::NumTargetFixupKinds;
94 const static MCFixupKindInfo Infos[X86::NumTargetFixupKinds] = {
144 case X86::JAE_1: return X86::JAE_4;
145 case X86::JA_1: return X86::JA_4;
146 case X86::JBE_1: return X86::JBE_4;
147 case X86::JB_1: return X86::JB_4;
148 case X86::JE_1: return X86::JE_4;
149 case X86::JGE_1: return X86::JGE_4;
150 case X86::JG_1: return X86::JG_4;
151 case X86::JLE_1: return X86::JLE_4;
152 case X86::JL_1: return X86::JL_4;
153 case X86::JMP_1: return X86::JMP_4;
154 case X86::JNE_1: return X86::JNE_4;
155 case X86::JNO_1: return X86::JNO_4;
156 case X86::JNP_1: return X86::JNP_4;
157 case X86::JNS_1: return X86::JNS_4;
158 case X86::JO_1: return X86::JO_4;
159 case X86::JP_1: return X86::JP_4;
160 case X86::JS_1: return X86::JS_4;
170 case X86::IMUL16rri8: return X86::IMUL16rri;
171 case X86::IMUL16rmi8: return X86::IMUL16rmi;
172 case X86::IMUL32rri8: return X86::IMUL32rri;
173 case X86::IMUL32rmi8: return X86::IMUL32rmi;
174 case X86::IMUL64rri8: return X86::IMUL64rri32;
175 case X86::IMUL64rmi8: return X86::IMUL64rmi32;
178 case X86::AND16ri8: return X86::AND16ri;
179 case X86::AND16mi8: return X86::AND16mi;
180 case X86::AND32ri8: return X86::AND32ri;
181 case X86::AND32mi8: return X86::AND32mi;
182 case X86::AND64ri8: return X86::AND64ri32;
183 case X86::AND64mi8: return X86::AND64mi32;
186 case X86::OR16ri8: return X86::OR16ri;
187 case X86::OR16mi8: return X86::OR16mi;
188 case X86::OR32ri8: return X86::OR32ri;
189 case X86::OR32mi8: return X86::OR32mi;
190 case X86::OR64ri8: return X86::OR64ri32;
191 case X86::OR64mi8: return X86::OR64mi32;
194 case X86::XOR16ri8: return X86::XOR16ri;
195 case X86::XOR16mi8: return X86::XOR16mi;
196 case X86::XOR32ri8: return X86::XOR32ri;
197 case X86::XOR32mi8: return X86::XOR32mi;
198 case X86::XOR64ri8: return X86::XOR64ri32;
199 case X86::XOR64mi8: return X86::XOR64mi32;
202 case X86::ADD16ri8: return X86::ADD16ri;
203 case X86::ADD16mi8: return X86::ADD16mi;
204 case X86::ADD32ri8: return X86::ADD32ri;
205 case X86::ADD32mi8: return X86::ADD32mi;
206 case X86::ADD64ri8: return X86::ADD64ri32;
207 case X86::ADD64mi8: return X86::ADD64mi32;
210 case X86::SUB16ri8: return X86::SUB16ri;
211 case X86::SUB16mi8: return X86::SUB16mi;
212 case X86::SUB32ri8: return X86::SUB32ri;
213 case X86::SUB32mi8: return X86::SUB32mi;
214 case X86::SUB64ri8: return X86::SUB64ri32;
215 case X86::SUB64mi8: return X86::SUB64mi32;
218 case X86::CMP16ri8: return X86::CMP16ri;
219 case X86::CMP16mi8: return X86::CMP16mi;
220 case X86::CMP32ri8: return X86::CMP32ri;
221 case X86::CMP32mi8: return X86::CMP32mi;
222 case X86::CMP64ri8: return X86::CMP64ri32;
223 case X86::CMP64mi8: return X86::CMP64mi32;
226 case X86::PUSH32i8: return X86::PUSHi32;
227 case X86::PUSH16i8: return X86::PUSHi16;
228 case X86::PUSH64i8: return X86::PUSH64i32;
229 case X86::PUSH64i16: return X86::PUSH64i32;
261 if (Op.isReg() && Op.getReg() == X86::RIP)
281 // The only relaxations X86 does is from a 1byte pcrel to a 4byte pcrel.
483 (Is64Bit ? X86::RBP : X86::EBP) && "Invalid frame pointer!");
612 X86::EBX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::EBP, 0
615 X86::RBX, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, 0