Cross Reference: /external/llvm/lib/Target/X86/X86ISelLowering.cpp

Lines Matching refs:TII
3090                          const X86InstrInfo *TII) {
3101       if (!TII->isLoadFromStackSlot(Def, FI))
3294       const X86InstrInfo *TII =
3304                                    MFI, MRI, TII))
16889                                      const TargetInstrInfo *TII) {
16923   BuildMI(thisMBB, DL, TII->get(X86::XBEGIN_4)).addMBB(sinkMBB);
16929   BuildMI(mainMBB, DL, TII->get(X86::MOV32ri), X86::EAX).addImm(-1);
16936           TII->get(TargetOpcode::COPY), MI->getOperand(0).getReg())
16947                                        const TargetInstrInfo *TII) {
16962   MachineInstrBuilder MIB = BuildMI(*BB, MI, dl, TII->get(Opc));
16974     TII->get(TargetOpcode::COPY), MI->getOperand(0).getReg())
16984                                        const TargetInstrInfo *TII) {
16999   MachineInstrBuilder MIB = BuildMI(*BB, MI, dl, TII->get(Opc));
17011     TII->get(TargetOpcode::COPY), MI->getOperand(0).getReg())
17019                                        const TargetInstrInfo *TII,
17026   MachineInstrBuilder MIB = BuildMI(*BB, MI, dl, TII->get(MemOpc), MemReg);
17031   BuildMI(*BB, MI, dl, TII->get(TargetOpcode::COPY), X86::ECX)
17033   BuildMI(*BB, MI, dl, TII->get(TargetOpcode::COPY), X86::EDX)
17037   BuildMI(*BB, MI, dl, TII->get(X86::MONITORrrr));
17076   const TargetInstrInfo *TII = MBB->getParent()->getTarget().getInstrInfo();
17166     BuildMI(thisMBB, DL, TII->get(X86::MOV32rm), OffsetReg)
17175     BuildMI(thisMBB, DL, TII->get(X86::CMP32ri))
17181     BuildMI(thisMBB, DL, TII->get(X86::GetCondBranchFromCond(X86::COND_AE)))
17191     BuildMI(offsetMBB, DL, TII->get(X86::MOV64rm), RegSaveReg)
17201       BuildMI(offsetMBB, DL, TII->get(X86::SUBREG_TO_REG), OffsetReg64)
17207     BuildMI(offsetMBB, DL, TII->get(X86::ADD64rr), OffsetDestReg)
17213     BuildMI(offsetMBB, DL, TII->get(X86::ADD32ri), NextOffsetReg)
17218     BuildMI(offsetMBB, DL, TII->get(X86::MOV32mr))
17228     BuildMI(offsetMBB, DL, TII->get(X86::JMP_4))
17238   BuildMI(overflowMBB, DL, TII->get(X86::MOV64rm), OverflowAddrReg)
17254     BuildMI(overflowMBB, DL, TII->get(X86::ADD64ri32), TmpReg)
17258     BuildMI(overflowMBB, DL, TII->get(X86::AND64ri32), OverflowDestReg)
17262     BuildMI(overflowMBB, DL, TII->get(TargetOpcode::COPY), OverflowDestReg)
17269   BuildMI(overflowMBB, DL, TII->get(X86::ADD64ri32), NextAddrReg)
17274   BuildMI(overflowMBB, DL, TII->get(X86::MOV64mr))
17286             TII->get(X86::PHI), DestReg)
17332   const TargetInstrInfo *TII = MBB->getParent()->getTarget().getInstrInfo();
17341     BuildMI(MBB, DL, TII->get(X86::TEST8rr)).addReg(CountReg).addReg(CountReg);
17342     BuildMI(MBB, DL, TII->get(X86::JE_4)).addMBB(EndMBB);
17361     BuildMI(XMMSaveMBB, DL, TII->get(MOVOpc))
17415   const TargetInstrInfo *TII = BB->getParent()->getTarget().getInstrInfo();
17460   BuildMI(BB, DL, TII->get(Opc)).addMBB(sinkMBB);
17471           TII->get(X86::PHI), MI->getOperand(0).getReg())
17483   const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
17536   BuildMI(BB, DL, TII->get(TargetOpcode::COPY), tmpSPVReg).addReg(physSPReg);
17537   BuildMI(BB, DL, TII->get(Is64Bit ? X86::SUB64rr:X86::SUB32rr), SPLimitVReg)
17539   BuildMI(BB, DL, TII->get(Is64Bit ? X86::CMP64mr:X86::CMP32mr))
17542   BuildMI(BB, DL, TII->get(X86::JG_4)).addMBB(mallocMBB);
17546   BuildMI(bumpMBB, DL, TII->get(TargetOpcode::COPY), physSPReg)
17548   BuildMI(bumpMBB, DL, TII->get(TargetOpcode::COPY), bumpSPPtrVReg)
17550   BuildMI(bumpMBB, DL, TII->get(X86::JMP_4)).addMBB(continueMBB);
17556     BuildMI(mallocMBB, DL, TII->get(X86::MOV64rr), X86::RDI)
17558     BuildMI(mallocMBB, DL, TII->get(X86::CALL64pcrel32))
17564     BuildMI(mallocMBB, DL, TII->get(X86::SUB32ri), physSPReg).addReg(physSPReg)
17566     BuildMI(mallocMBB, DL, TII->get(X86::PUSH32r)).addReg(sizeVReg);
17567     BuildMI(mallocMBB, DL, TII->get(X86::CALLpcrel32))
17574     BuildMI(mallocMBB, DL, TII->get(X86::ADD32ri), physSPReg).addReg(physSPReg)
17577   BuildMI(mallocMBB, DL, TII->get(TargetOpcode::COPY), mallocPtrVReg)
17579   BuildMI(mallocMBB, DL, TII->get(X86::JMP_4)).addMBB(continueMBB);
17588   BuildMI(*continueMBB, continueMBB->begin(), DL, TII->get(X86::PHI),
17603   const TargetInstrInfo *TII = BB->getParent()->getTarget().getInstrInfo();
17616       BuildMI(*BB, MI, DL, TII->get(X86::W64ALLOCA))
17626       BuildMI(*BB, MI, DL, TII->get(X86::W64ALLOCA))
17631       BuildMI(*BB, MI, DL, TII->get(X86::SUB64rr), X86::RSP)
17639     BuildMI(*BB, MI, DL, TII->get(X86::CALLpcrel32))
17660   const X86InstrInfo *TII
17674                                       TII->get(X86::MOV64rm), X86::RDI)
17680     MIB = BuildMI(*BB, MI, DL, TII->get(X86::CALL64m));
17685                                       TII->get(X86::MOV32rm), X86::EAX)
17691     MIB = BuildMI(*BB, MI, DL, TII->get(X86::CALL32m));
17696                                       TII->get(X86::MOV32rm), X86::EAX)
17697     .addReg(TII->getGlobalBaseReg(F))
17702     MIB = BuildMI(*BB, MI, DL, TII->get(X86::CALL32m));
17716   const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
17788       MIB = BuildMI(*thisMBB, MI, DL, TII->get(X86::LEA64r), LabelReg)
17795       const X86InstrInfo *XII = static_cast<const X86InstrInfo*>(TII);
17796       MIB = BuildMI(*thisMBB, MI, DL, TII->get(X86::LEA32r), LabelReg)
17806   MIB = BuildMI(*thisMBB, MI, DL, TII->get(PtrStoreOpc));
17819   MIB = BuildMI(*thisMBB, MI, DL, TII->get(X86::EH_SjLj_Setup))
17830   BuildMI(mainMBB, DL, TII->get(X86::MOV32r0), mainDstReg);
17835           TII->get(X86::PHI), DstReg)
17840   BuildMI(restoreMBB, DL, TII->get(X86::MOV32ri), restoreDstReg).addImm(1);
17841   BuildMI(restoreMBB, DL, TII->get(X86::JMP_4)).addMBB(sinkMBB);
17853   const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
17882   MIB = BuildMI(*MBB, MI, DL, TII->get(PtrLoadOpc), FP);
17887   MIB = BuildMI(*MBB, MI, DL, TII->get(PtrLoadOpc), Tmp);
17896   MIB = BuildMI(*MBB, MI, DL, TII->get(PtrLoadOpc), SP);
17905   BuildMI(*MBB, MI, DL, TII->get(IJmpOpc)).addReg(Tmp);
17979       const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
17981         BuildMI(MF, MI->getDebugLoc(), TII.get(NewFMAOpc))
18045     const TargetInstrInfo *TII = F->getTarget().getInstrInfo();
18052                               TII->get(X86::FNSTCW16m)), CWFrameIdx);
18057     addFrameReference(BuildMI(*BB, MI, DL, TII->get(X86::MOV16rm), OldCW),
18061     addFrameReference(BuildMI(*BB, MI, DL, TII->get(X86::MOV16mi)), CWFrameIdx)
18066                               TII->get(X86::FLDCW16m)), CWFrameIdx);
18069     addFrameReference(BuildMI(*BB, MI, DL, TII->get(X86::MOV16mr)), CWFrameIdx)
18108     addFullAddress(BuildMI(*BB, MI, DL, TII->get(Opc)), AM)
18113                               TII->get(X86::FLDCW16m)), CWFrameIdx);