Cross Reference: /external/mesa3d/src/gallium/auxiliary/tgsi/tgsi

Lines Matching defs:COMP
33 #define COMP TGSI_OUTPUT_COMPONENTWISE
40    { 1, 1, 0, 0, 0, 0, COMP, "ARL", TGSI_OPCODE_ARL },
41    { 1, 1, 0, 0, 0, 0, COMP, "MOV", TGSI_OPCODE_MOV },
47    { 1, 2, 0, 0, 0, 0, COMP, "MUL", TGSI_OPCODE_MUL },
48    { 1, 2, 0, 0, 0, 0, COMP, "ADD", TGSI_OPCODE_ADD },
52    { 1, 2, 0, 0, 0, 0, COMP, "MIN", TGSI_OPCODE_MIN },
53    { 1, 2, 0, 0, 0, 0, COMP, "MAX", TGSI_OPCODE_MAX },
54    { 1, 2, 0, 0, 0, 0, COMP, "SLT", TGSI_OPCODE_SLT },
55    { 1, 2, 0, 0, 0, 0, COMP, "SGE", TGSI_OPCODE_SGE },
56    { 1, 3, 0, 0, 0, 0, COMP, "MAD", TGSI_OPCODE_MAD },
57    { 1, 2, 0, 0, 0, 0, COMP, "SUB", TGSI_OPCODE_SUB },
58    { 1, 3, 0, 0, 0, 0, COMP, "LRP", TGSI_OPCODE_LRP },
59    { 1, 3, 0, 0, 0, 0, COMP, "CND", TGSI_OPCODE_CND },
64    { 1, 1, 0, 0, 0, 0, COMP, "FRC", TGSI_OPCODE_FRC },
65    { 1, 3, 0, 0, 0, 0, COMP, "CLAMP", TGSI_OPCODE_CLAMP },
66    { 1, 1, 0, 0, 0, 0, COMP, "FLR", TGSI_OPCODE_FLR },
67    { 1, 1, 0, 0, 0, 0, COMP, "ROUND", TGSI_OPCODE_ROUND },
71    { 1, 2, 0, 0, 0, 0, COMP, "XPD", TGSI_OPCODE_XPD },
73    { 1, 1, 0, 0, 0, 0, COMP, "ABS", TGSI_OPCODE_ABS },
77    { 1, 1, 0, 0, 0, 0, COMP, "DDX", TGSI_OPCODE_DDX },
78    { 1, 1, 0, 0, 0, 0, COMP, "DDY", TGSI_OPCODE_DDY },
80    { 1, 1, 0, 0, 0, 0, COMP, "PK2H", TGSI_OPCODE_PK2H },
81    { 1, 1, 0, 0, 0, 0, COMP, "PK2US", TGSI_OPCODE_PK2US },
82    { 1, 1, 0, 0, 0, 0, COMP, "PK4B", TGSI_OPCODE_PK4B },
83    { 1, 1, 0, 0, 0, 0, COMP, "PK4UB", TGSI_OPCODE_PK4UB },
84    { 1, 2, 0, 0, 0, 0, COMP, "RFL", TGSI_OPCODE_RFL },
85    { 1, 2, 0, 0, 0, 0, COMP, "SEQ", TGSI_OPCODE_SEQ },
87    { 1, 2, 0, 0, 0, 0, COMP, "SGT", TGSI_OPCODE_SGT },
89    { 1, 2, 0, 0, 0, 0, COMP, "SLE", TGSI_OPCODE_SLE },
90    { 1, 2, 0, 0, 0, 0, COMP, "SNE", TGSI_OPCODE_SNE },
95    { 1, 1, 0, 0, 0, 0, COMP, "UP2H", TGSI_OPCODE_UP2H },
96    { 1, 1, 0, 0, 0, 0, COMP, "UP2US", TGSI_OPCODE_UP2US },
97    { 1, 1, 0, 0, 0, 0, COMP, "UP4B", TGSI_OPCODE_UP4B },
98    { 1, 1, 0, 0, 0, 0, COMP, "UP4UB", TGSI_OPCODE_UP4UB },
99    { 1, 3, 0, 0, 0, 0, COMP, "X2D", TGSI_OPCODE_X2D },
100    { 1, 1, 0, 0, 0, 0, COMP, "ARA", TGSI_OPCODE_ARA },
101    { 1, 1, 0, 0, 0, 0, COMP, "ARR", TGSI_OPCODE_ARR },
105    { 1, 1, 0, 0, 0, 0, COMP, "SSG", TGSI_OPCODE_SSG },
106    { 1, 3, 0, 0, 0, 0, COMP, "CMP", TGSI_OPCODE_CMP },
109    { 1, 1, 0, 0, 0, 0, COMP, "NRM", TGSI_OPCODE_NRM },
110    { 1, 2, 0, 0, 0, 0, COMP, "DIV", TGSI_OPCODE_DIV },
123    { 1, 1, 0, 0, 0, 0, COMP, "CEIL", TGSI_OPCODE_CEIL },
124    { 1, 1, 0, 0, 0, 0, COMP, "I2F", TGSI_OPCODE_I2F },
125    { 1, 1, 0, 0, 0, 0, COMP, "NOT", TGSI_OPCODE_NOT },
126    { 1, 1, 0, 0, 0, 0, COMP, "TRUNC", TGSI_OPCODE_TRUNC },
127    { 1, 2, 0, 0, 0, 0, COMP, "SHL", TGSI_OPCODE_SHL },
129    { 1, 2, 0, 0, 0, 0, COMP, "AND", TGSI_OPCODE_AND },
130    { 1, 2, 0, 0, 0, 0, COMP, "OR", TGSI_OPCODE_OR },
131    { 1, 2, 0, 0, 0, 0, COMP, "MOD", TGSI_OPCODE_MOD },
132    { 1, 2, 0, 0, 0, 0, COMP, "XOR", TGSI_OPCODE_XOR },
133    { 1, 3, 0, 0, 0, 0, COMP, "SAD", TGSI_OPCODE_SAD },
159    { 1, 1, 0, 0, 0, 0, COMP, "F2I", TGSI_OPCODE_F2I },
160    { 1, 2, 0, 0, 0, 0, COMP, "IDIV", TGSI_OPCODE_IDIV },
161    { 1, 2, 0, 0, 0, 0, COMP, "IMAX", TGSI_OPCODE_IMAX },
162    { 1, 2, 0, 0, 0, 0, COMP, "IMIN", TGSI_OPCODE_IMIN },
163    { 1, 1, 0, 0, 0, 0, COMP, "INEG", TGSI_OPCODE_INEG },
164    { 1, 2, 0, 0, 0, 0, COMP, "ISGE", TGSI_OPCODE_ISGE },
165    { 1, 2, 0, 0, 0, 0, COMP, "ISHR", TGSI_OPCODE_ISHR },
166    { 1, 2, 0, 0, 0, 0, COMP, "ISLT", TGSI_OPCODE_ISLT },
167    { 1, 1, 0, 0, 0, 0, COMP, "F2U", TGSI_OPCODE_F2U },
168    { 1, 1, 0, 0, 0, 0, COMP, "U2F", TGSI_OPCODE_U2F },
169    { 1, 2, 0, 0, 0, 0, COMP, "UADD", TGSI_OPCODE_UADD },
170    { 1, 2, 0, 0, 0, 0, COMP, "UDIV", TGSI_OPCODE_UDIV },
171    { 1, 3, 0, 0, 0, 0, COMP, "UMAD", TGSI_OPCODE_UMAD },
172    { 1, 2, 0, 0, 0, 0, COMP, "UMAX", TGSI_OPCODE_UMAX },
173    { 1, 2, 0, 0, 0, 0, COMP, "UMIN", TGSI_OPCODE_UMIN },
174    { 1, 2, 0, 0, 0, 0, COMP, "UMOD", TGSI_OPCODE_UMOD },
175    { 1, 2, 0, 0, 0, 0, COMP, "UMUL", TGSI_OPCODE_UMUL },
176    { 1, 2, 0, 0, 0, 0, COMP, "USEQ", TGSI_OPCODE_USEQ },
177    { 1, 2, 0, 0, 0, 0, COMP, "USGE", TGSI_OPCODE_USGE },
178    { 1, 2, 0, 0, 0, 0, COMP, "USHR", TGSI_OPCODE_USHR },
179    { 1, 2, 0, 0, 0, 0, COMP, "USLT", TGSI_OPCODE_USLT },
180    { 1, 2, 0, 0, 0, 0, COMP, "USNE", TGSI_OPCODE_USNE },
198    { 1, 1, 0, 0, 0, 0, COMP, "UARL", TGSI_OPCODE_UARL },
199    { 1, 3, 0, 0, 0, 0, COMP, "UCMP", TGSI_OPCODE_UCMP },
200    { 1, 1, 0, 0, 0, 0, COMP, "IABS", TGSI_OPCODE_IABS },
201    { 1, 1, 0, 0, 0, 0, COMP, "ISSG", TGSI_OPCODE_ISSG },