Cross Reference: /external/mesa3d/src/gallium/drivers/nvc0/nvc0

Lines Matching refs:hdr
219    uint8_t min = (vp->hdr[4] >> 12) & 0xff;
220    uint8_t max = (vp->hdr[4] >> 24);
225    vp->hdr[4] = (max << 24) | (min << 12);
241                vp->hdr[5 + a / 32] |= 1 << (a % 32);
256          vp->hdr[13 + a / 32] |= 1 << (a % 32);
265          vp->hdr[5] |= 1 << 24;
268          vp->hdr[10] |= 1 << 30;
271          vp->hdr[10] |= 1 << 31;
292    vp->hdr[0] = 0x20061 | (1 << 10);
293    vp->hdr[4] = 0xff000;
295    vp->hdr[18] = info->io.clipDistanceMask;
356    tcp->hdr[0] = 0x20061 | (2 << 10);
358    tcp->hdr[1] = opcs << 24;
359    tcp->hdr[2] = info->prop.tp.outputPatchSize << 24;
361    tcp->hdr[4] = 0xff000; /* initial min/max parallel output read address */
377    tep->hdr[0] = 0x20061 | (3 << 10);
378    tep->hdr[4] = 0xff000;
384    tep->hdr[18] |= 0x3 << 12; /* ? */
393    gp->hdr[0] = 0x20061 | (4 << 10);
395    gp->hdr[2] = MIN2(info->prop.gp.instanceCount, 32) << 24;
399       gp->hdr[3] = 0x01000000;
400       gp->hdr[0] |= 0xf0000000;
403       gp->hdr[3] = 0x06000000;
404       gp->hdr[0] |= 0x10000000;
407       gp->hdr[3] = 0x07000000;
408       gp->hdr[0] |= 0x10000000;
415    gp->hdr[4] = info->prop.gp.maxVertices & 0x1ff;
441    fp->hdr[0] = 0x20062 | (5 << 10);
442    fp->hdr[5] = 0x80000000; /* getting a trap if FRAG_COORD_UMASK.w = 0 */
445       fp->hdr[0] |= 0x8000;
447       fp->hdr[0] |= 0x4000;
449       fp->hdr[19] |= 0x1;
451       fp->hdr[19] |= 0x2;
463             fp->hdr[5] |= 1 << (24 + (a - 0x060 / 4));
467             fp->hdr[14] |= (1 << (a - 0x280 / 4)) & 0x03ff0000;
475             fp->hdr[4 + a / 32] |= m << (a % 32);
482          fp->hdr[18] |= info->out[i].mask << info->out[i].slot[0];
530    for (pos = 0; pos < sizeof(prog->hdr) / sizeof(prog->hdr[0]); ++pos)
532                    pos * sizeof(prog->hdr[0]), prog->hdr[pos]);
623       prog->hdr[0] |= 1 << 26;
624       prog->hdr[1] |= info->bin.tlsSpace; /* l[] size */
632       prog->hdr[2] |= (((info->maxCFDepth * 2) + 47) / 48) * 0x200;
637       prog->hdr[0] |= 1 << 16;
704                         NOUVEAU_BO_VRAM, NVC0_SHADER_HEADER_SIZE, prog->hdr);