Lines Matching refs:bs
668 static void init_bank_swizzle(struct alu_bank_swizzle *bs)
674 bs->hw_gpr[cycle][component] = -1;
676 bs->hw_cfile_addr[i] = -1;
678 bs->hw_cfile_elem[i] = -1;
681 static int reserve_gpr(struct alu_bank_swizzle *bs, unsigned sel, unsigned chan, unsigned cycle)
683 if (bs->hw_gpr[cycle][chan] == -1)
684 bs->hw_gpr[cycle][chan] = sel;
685 else if (bs->hw_gpr[cycle][chan] != (int)sel) {
692 static int reserve_cfile(struct r600_bytecode *bc, struct alu_bank_swizzle *bs, unsigned sel, unsigned chan)
700 if (bs->hw_cfile_addr[res] == -1) {
701 bs->hw_cfile_addr[res] = sel;
702 bs->hw_cfile_elem[res] = chan;
704 } else if (bs->hw_cfile_addr[res] == sel &&
705 bs->hw_cfile_elem[res] == chan)
735 struct alu_bank_swizzle *bs, int bank_swizzle)
750 r = reserve_gpr(bs, sel, elem, cycle);
755 r = reserve_cfile(bc, bs, (alu->src[src].kc_bank<<16) + sel, elem);
765 struct alu_bank_swizzle *bs, int bank_swizzle)
782 r = reserve_cfile(bc, bs, (alu->src[src].kc_bank<<16) + sel, elem);
796 r = reserve_gpr(bs, sel, elem, cycle);
813 struct alu_bank_swizzle bs;
851 init_bank_swizzle(&bs);
855 r = check_vector(bc, slots[i], &bs, bank_swizzle[i]);
864 r = check_scalar(bc, slots[4], &bs, bank_swizzle[4]);