Cross Reference: /external/mesa3d/src/mesa/drivers/dri/i965/brw

Lines Matching defs:mov
36     [BRW_OPCODE_MOV] = { .name = "mov", .nsrc = 1, .ndst = 1, .is_arith = 1 },
228 /* SEND may perform an implicit mov to a mrf register */
275    /* Look if SEND uses an implicit mov. In that case, we read one less register
378 brw_is_control_done(const struct brw_instruction *mov) {
380        mov->header.dependency_control != 0 ||
381        mov->header.thread_control != 0 ||
382        mov->header.mask_control != 0 ||
383        mov->header.saturate != 0 ||
384        mov->header.debug_control != 0;
388 brw_is_predicated(const struct brw_instruction *mov) {
389    return mov->header.predicate_control != 0;
393 brw_is_grf_to_mrf_mov(const struct brw_instruction *mov,
398    if (brw_is_predicated(mov) ||
399        brw_is_control_done(mov) ||
400        mov->header.debug_control != 0)
403    if (mov->bits1.da1.dest_address_mode != BRW_ADDRESS_DIRECT ||
404        mov->bits1.da1.dest_reg_file != BRW_MESSAGE_REGISTER_FILE ||
405        mov->bits1.da1.dest_reg_type != BRW_REGISTER_TYPE_F ||
406        mov->bits1.da1.dest_horiz_stride != BRW_HORIZONTAL_STRIDE_1 ||
407        mov->bits1.da1.dest_subreg_nr != 0)
410    if (mov->bits2.da1.src0_address_mode != BRW_ADDRESS_DIRECT ||
411        mov->bits1.da1.src0_reg_file != BRW_GENERAL_REGISTER_FILE ||
412        mov->bits1.da1.src0_reg_type != BRW_REGISTER_TYPE_F ||
413        mov->bits2.da1.src0_width != BRW_WIDTH_8 ||
414        mov->bits2.da1.src0_horiz_stride != BRW_HORIZONTAL_STRIDE_1 ||
415        mov->bits2.da1.src0_vert_stride != BRW_VERTICAL_STRIDE_8 ||
416        mov->bits2.da1.src0_subreg_nr != 0 ||
417        mov->bits2.da1.src0_abs != 0 ||
418        mov->bits2.da1.src0_negate != 0)
421    *grf_index = mov->bits2.da1.src0_reg_nr;
422    *mrf_index = mov->bits1.da1.dest_reg_nr & 0x0f;
423    *is_compr4 = (mov->bits1.da1.dest_reg_nr & BRW_MRF_COMPR4) != 0;
491  * coordinates from multiple textures..  Here, we monitor same mov
505       const struct brw_instruction *mov = p->store + i;
510       if (!brw_is_grf_to_mrf_mov(mov, &mrf_index, &grf_index, &is_compr4))
520          if (brw_inst_are_equal(mov, inst)) {
554       const struct brw_instruction *mov = p->store + i;
559       if (!brw_is_grf_to_mrf_mov(mov, &mrf_index, &grf_index, &is_compr4))
571          /* If _one_ instruction writes the grf, we try to remove the mov */
586        * mov. Here we cannot read or write both mrf and grf register
603       /* After the mov, we can read or write the mrf. If the grf is overwritten,
620       /* Note that with the top down traversal, we can safely pacth the mov
624          grf_inst->bits1.da1.dest_reg_file = mov->bits1.da1.dest_reg_file;
625          grf_inst->bits1.da1.dest_reg_nr = mov->bits1.da1.dest_reg_nr;