Lines Matching refs:is
4 * Permission is hereby granted, free of charge, to any person obtaining a
9 * Software is furnished to do so, subject to the following conditions:
28 * functions. There is no full and detailed tutorial, but some functions
67 * Set default prefetch type. There is a choice between the following options:
69 * PREFETCH_TYPE_NONE (may be useful for the ARM cores where PLD is set to work
102 * NEON registers allocation in general is recommented to be the following:
105 * d24, d25, d26, d27 - contain loading mask pixel data (if mask is used)
120 * This is implemented as a pair of macros: '*_head' and '*_tail'. When used
127 * There is one special trick here too. Common template macro can optionally
129 * deinterleaving for 32bpp pixel formats (and this feature is used in
149 * instruction. It is 1 cycle slower than VLD1.32, so this is not always
150 * desirable, that's why deinterleaving is optional.
152 * But anyway, here is the code:
192 * it a bit. ARM Cortex-A8 is an in-order core, and benefits really
208 * So what we need now is a '*_tail_head' macro, which will be used
224 * of pixels in a bulk. Additionally, destination buffer is already
225 * 16 bytes aligned here (which is good for performance).
232 * Another new thing is 'cache_preload' macro. It is used for prefetching
237 * details about this macro. Moreover, if good performance is needed
242 * Now after all the explanations, here is the optimized code.
313 * FLAG_DST_READWRITE - tells that the destination buffer is both read
321 * - prefetch distance, measured in pixel blocks. In this case it is 5 times
326 * 'default_cleanup' here which are empty (but it is possible to have custom
334 * The last part is the NEON registers allocation scheme.
947 * Solid source pixel data is fetched from stack at ARGS_STACK_OFFSET
1225 /* mask is in d24 (d25, d26, d27 are unused) */
1366 /* mask is in d24 (d25, d26, d27 are unused) */
1872 /* mask is in d24, d25, d26, d27 */
2127 /* solid mask is in d15 */
2519 /* mask is in d15 */
2522 /* source pixel data is in {d0, d1, d2, XX} */
2523 /* destination pixel data is in {d4, d5, d6, XX} */
2548 /* 32bpp result is in {d0, d1, d2, XX} */
2609 /* mask is in d15 */
2612 /* source pixel data is in {d0, d1, d2, XX} */
2613 /* destination pixel data is in {d4, d5, d6, XX} */
2628 /* 32bpp result is in {d0, d1, d2, XX} */
2661 /* mask is in d15 */
2663 /* destination pixel data is in {d4, d5, d6, xx} */
2678 /* 32bpp result is in {d0, d1, d2, XX} */
2710 /* src is in d0 */
2711 /* destination pixel data is in {d4, d5, d6, d7} */
2729 /* 32bpp result is in {d28, d29, d30, d31} */
2964 .error bilinear_store_8888 numpix is unsupported
2981 .error bilinear_store_0565 numpix is unsupported
3110 * bpp_shift - (1 << bpp_shift) is the size of source pixel in bytes