Lines Matching refs:tmp
564 uint32_t tmp;
592 tmp = ldl_p(mem_buf);\
593 if (tmp != env->segs[sreg].selector)\
594 cpu_x86_load_seg(env, sreg, tmp);
609 tmp = ldl_p(mem_buf);
610 env->fpstt = (tmp >> 11) & 7;
611 env->fpus = tmp & ~0x3800;
796 abi_ulong tmp;
798 tmp = ldl_p(mem_buf);
800 target_ulong tmp;
802 tmp = ldtul_p(mem_buf);
807 env->gregs[n] = tmp;
810 env->regwptr[n - 8] = tmp;
815 *((uint32_t *)&env->fpr[n - 32]) = tmp;
819 case 64: env->y = tmp; break;
820 case 65: PUT_PSR(env, tmp); break;
821 case 66: env->wim = tmp; break;
822 case 67: env->tbr = tmp; break;
823 case 68: env->pc = tmp; break;
824 case 69: env->npc = tmp; break;
825 case 70: env->fsr = tmp; break;
837 *((uint32_t *)&env->fpr[(n - 64) * 2 + 32]) = tmp >> 32;
838 *((uint32_t *)&env->fpr[(n - 64) * 2 + 33]) = tmp;
841 case 80: env->pc = tmp; break;
842 case 81: env->npc = tmp; break;
844 PUT_CCR(env, tmp >> 32);
845 env->asi = (tmp >> 24) & 0xff;
846 env->pstate = (tmp >> 8) & 0xfff;
847 PUT_CWP64(env, tmp & 0xff);
849 case 83: env->fsr = tmp; break;
850 case 84: env->fprs = tmp; break;
851 case 85: env->y = tmp; break;
897 uint32_t tmp;
899 tmp = ldl_p(mem_buf);
904 tmp &= ~1;
908 env->regs[n] = tmp;
925 cpsr_write (env, tmp, 0xffffffff);
959 uint32_t tmp;
961 tmp = ldl_p(mem_buf);
965 env->dregs[n] = tmp;
968 env->aregs[n - 8] = tmp;
971 case 16: env->sr = tmp; break;
972 case 17: env->pc = tmp; break;
1030 target_ulong tmp;
1032 tmp = ldtul_p(mem_buf);
1035 env->active_tc.gpr[n] = tmp;
1042 env->active_fpu.fpr[n - 38].d = tmp;
1044 env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX] = tmp;
1048 env->active_fpu.fcr31 = tmp & 0xFF83FFFF;
1056 case 71: env->active_fpu.fcr0 = tmp; break;
1061 case 32: env->CP0_Status = tmp; break;
1062 case 33: env->active_tc.LO[0] = tmp; break;
1063 case 34: env->active_tc.HI[0] = tmp; break;
1064 case 35: env->CP0_BadVAddr = tmp; break;
1065 case 36: env->CP0_Cause = tmp; break;
1066 case 37: env->active_tc.PC = tmp; break;
1120 uint32_t tmp;
1122 tmp = ldl_p(mem_buf);
1126 env->gregs[n + 16] = tmp;
1128 env->gregs[n] = tmp;
1132 env->gregs[n - 8] = tmp;
1135 env->fregs[(n - 25) + ((env->fpscr & FPSCR_FR) ? 16 : 0)] = tmp;
1137 env->gregs[n - 43] = tmp;
1140 env->gregs[n - (51 - 16)] = tmp;
1144 case 16: env->pc = tmp;
1145 case 17: env->pr = tmp;
1146 case 18: env->gbr = tmp;
1147 case 19: env->vbr = tmp;
1148 case 20: env->mach = tmp;
1149 case 21: env->macl = tmp;
1150 case 22: env->sr = tmp;
1151 case 23: env->fpul = tmp;
1152 case 24: env->fpscr = tmp;
1153 case 41: env->ssr = tmp;
1154 case 42: env->spc = tmp;
1176 uint32_t tmp;
1181 tmp = ldl_p(mem_buf);
1184 env->regs[n] = tmp;
1186 env->sregs[n - 32] = tmp;
1223 uint32_t tmp;
1228 tmp = ldl_p(mem_buf);
1231 env->regs[n] = tmp;
1235 env->pregs[n - 16] = tmp;
1242 case 18: env->pregs[PR_PID] = tmp; break;
1245 case 32: env->pc = tmp; break;
1283 target_ulong tmp;
1284 tmp = ldtul_p(mem_buf);
1287 env->ir[n] = tmp;
1295 env->pc=tmp;