Lines Matching refs:env
138 CPUX86State *env = cpu->env_ptr;
140 env->mp_state = KVM_MP_STATE_RUNNABLE;
144 cpu_x86_cpuid(env, 0, 0, &limit, &unused, &unused, &unused);
157 cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
164 cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
175 cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx);
190 cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
194 cpu_x86_cpuid(env, 0x80000000, 0, &limit, &unused, &unused, &unused);
201 cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
209 static int kvm_has_msr_star(CPUX86State *env)
213 CPUState *cpu = ENV_GET_CPU(env);
332 static int kvm_getput_regs(CPUX86State *env, int set)
338 ret = kvm_vcpu_ioctl(ENV_GET_CPU(env), KVM_GET_REGS, ®s);
343 kvm_getput_reg(®s.rax, &env->regs[R_EAX], set);
344 kvm_getput_reg(®s.rbx, &env->regs[R_EBX], set);
345 kvm_getput_reg(®s.rcx, &env->regs[R_ECX], set);
346 kvm_getput_reg(®s.rdx, &env->regs[R_EDX], set);
347 kvm_getput_reg(®s.rsi, &env->regs[R_ESI], set);
348 kvm_getput_reg(®s.rdi, &env->regs[R_EDI], set);
349 kvm_getput_reg(®s.rsp, &env->regs[R_ESP], set);
350 kvm_getput_reg(®s.rbp, &env->regs[R_EBP], set);
352 kvm_getput_reg(®s.r8, &env->regs[8], set);
353 kvm_getput_reg(®s.r9, &env->regs[9], set);
354 kvm_getput_reg(®s.r10, &env->regs[10], set);
355 kvm_getput_reg(®s.r11, &env->regs[11], set);
356 kvm_getput_reg(®s.r12, &env->regs[12], set);
357 kvm_getput_reg(®s.r13, &env->regs[13], set);
358 kvm_getput_reg(®s.r14, &env->regs[14], set);
359 kvm_getput_reg(®s.r15, &env->regs[15], set);
362 kvm_getput_reg(®s.rflags, &env->eflags, set);
363 kvm_getput_reg(®s.rip, &env->eip, set);
366 ret = kvm_vcpu_ioctl(ENV_GET_CPU(env), KVM_SET_REGS, ®s);
371 static int kvm_put_fpu(CPUX86State *env)
377 fpu.fsw = env->fpus & ~(7 << 11);
378 fpu.fsw |= (env->fpstt & 7) << 11;
379 fpu.fcw = env->fpuc;
381 fpu.ftwx |= (!env->fptags[i]) << i;
382 memcpy(fpu.fpr, env->fpregs, sizeof env->fpregs);
383 memcpy(fpu.xmm, env->xmm_regs, sizeof env->xmm_regs);
384 fpu.mxcsr = env->mxcsr;
386 return kvm_vcpu_ioctl(ENV_GET_CPU(env), KVM_SET_FPU, &fpu);
389 static int kvm_put_sregs(CPUX86State *env)
394 env->interrupt_bitmap,
397 if ((env->eflags & VM_MASK)) {
398 set_v8086_seg(&sregs.cs, &env->segs[R_CS]);
399 set_v8086_seg(&sregs.ds, &env->segs[R_DS]);
400 set_v8086_seg(&sregs.es, &env->segs[R_ES]);
401 set_v8086_seg(&sregs.fs, &env->segs[R_FS]);
402 set_v8086_seg(&sregs.gs, &env->segs[R_GS]);
403 set_v8086_seg(&sregs.ss, &env->segs[R_SS]);
405 set_seg(&sregs.cs, &env->segs[R_CS]);
406 set_seg(&sregs.ds, &env->segs[R_DS]);
407 set_seg(&sregs.es, &env->segs[R_ES]);
408 set_seg(&sregs.fs, &env->segs[R_FS]);
409 set_seg(&sregs.gs, &env->segs[R_GS]);
410 set_seg(&sregs.ss, &env->segs[R_SS]);
412 if (env->cr[0] & CR0_PE_MASK) {
420 set_seg(&sregs.tr, &env->tr);
421 set_seg(&sregs.ldt, &env->ldt);
423 sregs.idt.limit = env->idt.limit;
424 sregs.idt.base = env->idt.base;
425 sregs.gdt.limit = env->gdt.limit;
426 sregs.gdt.base = env->gdt.base;
428 sregs.cr0 = env->cr[0];
429 sregs.cr2 = env->cr[2];
430 sregs.cr3 = env->cr[3];
431 sregs.cr4 = env->cr[4];
433 sregs.cr8 = cpu_get_apic_tpr(env);
434 sregs.apic_base = cpu_get_apic_base(env);
436 sregs.efer = env->efer;
438 return kvm_vcpu_ioctl(ENV_GET_CPU(env), KVM_SET_SREGS, &sregs);
448 static int kvm_put_msrs(CPUX86State *env)
457 kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_CS, env->sysenter_cs);
458 kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_ESP, env->sysenter_esp);
459 kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_EIP, env->sysenter_eip);
460 if (kvm_has_msr_star(env))
461 kvm_msr_entry_set(&msrs[n++], MSR_STAR, env->star);
462 kvm_msr_entry_set(&msrs[n++], MSR_IA32_TSC, env->tsc);
465 kvm_msr_entry_set(&msrs[n++], MSR_CSTAR, env->cstar);
466 kvm_msr_entry_set(&msrs[n++], MSR_KERNELGSBASE, env->kernelgsbase);
467 kvm_msr_entry_set(&msrs[n++], MSR_FMASK, env->fmask);
468 kvm_msr_entry_set(&msrs[n++], MSR_LSTAR, env->lstar);
472 return kvm_vcpu_ioctl(ENV_GET_CPU(env), KVM_SET_MSRS, &msr_data);
477 static int kvm_get_fpu(CPUX86State *env)
482 ret = kvm_vcpu_ioctl(ENV_GET_CPU(env), KVM_GET_FPU, &fpu);
486 env->fpstt = (fpu.fsw >> 11) & 7;
487 env->fpus = fpu.fsw;
488 env->fpuc = fpu.fcw;
490 env->fptags[i] = !((fpu.ftwx >> i) & 1);
491 memcpy(env->fpregs, fpu.fpr, sizeof env->fpregs);
492 memcpy(env->xmm_regs, fpu.xmm, sizeof env->xmm_regs);
493 env->mxcsr = fpu.mxcsr;
500 CPUX86State *env = cpu->env_ptr;
509 memcpy(env->interrupt_bitmap,
513 get_seg(&env->segs[R_CS], &sregs.cs);
514 get_seg(&env->segs[R_DS], &sregs.ds);
515 get_seg(&env->segs[R_ES], &sregs.es);
516 get_seg(&env->segs[R_FS], &sregs.fs);
517 get_seg(&env->segs[R_GS], &sregs.gs);
518 get_seg(&env->segs[R_SS], &sregs.ss);
520 get_seg(&env->tr, &sregs.tr);
521 get_seg(&env->ldt, &sregs.ldt);
523 env->idt.limit = sregs.idt.limit;
524 env->idt.base = sregs.idt.base;
525 env->gdt.limit = sregs.gdt.limit;
526 env->gdt.base = sregs.gdt.base;
528 env->cr[0] = sregs.cr0;
529 env->cr[2] = sregs.cr2;
530 env->cr[3] = sregs.cr3;
531 env->cr[4] = sregs.cr4;
533 cpu_set_apic_base(env, sregs.apic_base);
535 env->efer = sregs.efer;
536 //cpu_set_apic_tpr(env, sregs.cr8);
546 hflags = (env->segs[R_CS].flags >> DESC_DPL_SHIFT) & HF_CPL_MASK;
547 hflags |= (env->cr[0] & CR0_PE_MASK) << (HF_PE_SHIFT - CR0_PE_SHIFT);
548 hflags |= (env->cr[0] << (HF_MP_SHIFT - CR0_MP_SHIFT)) &
550 hflags |= (env->eflags & (HF_TF_MASK | HF_VM_MASK | HF_IOPL_MASK));
551 hflags |= (env->cr[4] & CR4_OSFXSR_MASK) <<
554 if (env->efer & MSR_EFER_LMA) {
558 if ((hflags & HF_LMA_MASK) && (env->segs[R_CS].flags & DESC_L_MASK)) {
561 hflags |= (env->segs[R_CS].flags & DESC_B_MASK) >>
563 hflags |= (env->segs[R_SS].flags & DESC_B_MASK) >>
565 if (!(env->cr[0] & CR0_PE_MASK) ||
566 (env->eflags & VM_MASK) ||
570 hflags |= ((env->segs[R_DS].base |
571 env->segs[R_ES].base |
572 env->segs[R_SS].base) != 0) <<
576 env->hflags = (env->hflags & HFLAG_COPY_MASK) | hflags;
581 static int kvm_get_msrs(CPUX86State *env)
594 if (kvm_has_msr_star(env))
605 ret = kvm_vcpu_ioctl(ENV_GET_CPU(env), KVM_GET_MSRS, &msr_data);
612 env->sysenter_cs = msrs[i].data;
615 env->sysenter_esp = msrs[i].data;
618 env->sysenter_eip = msrs[i].data;
621 env->star = msrs[i].data;
625 env->cstar = msrs[i].data;
628 env->kernelgsbase = msrs[i].data;
631 env->fmask = msrs[i].data;
634 env->lstar = msrs[i].data;
638 env->tsc = msrs[i].data;
648 CPUX86State *env = cpu->env_ptr;
651 ret = kvm_getput_regs(env, 1);
655 ret = kvm_put_fpu(env);
659 ret = kvm_put_sregs(env);
663 ret = kvm_put_msrs(env);
681 CPUX86State *env = cpu->env_ptr;
683 ret = kvm_getput_regs(env, 0);
687 ret = kvm_get_fpu(env);
695 ret = kvm_get_msrs(env);
714 CPUX86State *env = cpu->env_ptr;
719 (env->eflags & IF_MASK)) {
723 irq = cpu_get_pic_interrupt(env);
743 run->cr8 = cpu_get_apic_tpr(env);
754 CPUX86State *env = cpu->env_ptr;
759 env->eflags |= IF_MASK;
761 env->eflags &= ~IF_MASK;
763 cpu_set_apic_tpr(env, run->cr8);
764 cpu_set_apic_base(env, run->apic_base);
771 CPUX86State *env = cpu->env_ptr;
774 (env->eflags & IF_MASK)) &&
777 env->exception_index = EXCP_HLT;