Lines Matching defs:cpu_A0

77 static TCGv cpu_A0, cpu_cc_src, cpu_cc_dst;
277 tcg_gen_movi_tl(cpu_A0, val);
283 tcg_gen_movi_tl(cpu_A0, val);
314 tcg_gen_andi_tl(cpu_A0, cpu_A0, 0xffff);
407 tcg_gen_st16_tl(cpu_A0, cpu_env, offsetof(CPUX86State, regs[reg]) + REG_W_OFFSET);
411 tcg_gen_st32_tl(cpu_A0, cpu_env, offsetof(CPUX86State, regs[reg]) + REG_L_OFFSET);
418 tcg_gen_st_tl(cpu_A0, cpu_env, offsetof(CPUX86State, regs[reg]));
423 tcg_gen_st32_tl(cpu_A0, cpu_env, offsetof(CPUX86State, regs[reg]) + REG_L_OFFSET);
445 tcg_gen_ld32u_tl(cpu_A0, cpu_env, offsetof(CPUX86State, regs[reg]) + REG_L_OFFSET);
450 tcg_gen_addi_tl(cpu_A0, cpu_A0, val);
452 tcg_gen_andi_tl(cpu_A0, cpu_A0, 0xffffffff);
459 tcg_gen_addi_tl(cpu_A0, cpu_A0, val);
540 tcg_gen_add_tl(cpu_A0, cpu_A0, cpu_tmp0);
542 tcg_gen_andi_tl(cpu_A0, cpu_A0, 0xffffffff);
548 tcg_gen_ld32u_tl(cpu_A0, cpu_env, offsetof(CPUX86State, segs[reg].base) + REG_L_OFFSET);
554 tcg_gen_add_tl(cpu_A0, cpu_A0, cpu_tmp0);
556 tcg_gen_andi_tl(cpu_A0, cpu_A0, 0xffffffff);
563 tcg_gen_ld_tl(cpu_A0, cpu_env, offsetof(CPUX86State, segs[reg].base));
569 tcg_gen_add_tl(cpu_A0, cpu_A0, cpu_tmp0);
574 tcg_gen_ld_tl(cpu_A0, cpu_env, offsetof(CPUX86State, regs[reg]));
582 tcg_gen_add_tl(cpu_A0, cpu_A0, cpu_tmp0);
591 tcg_gen_qemu_ld8s(cpu_T[0], cpu_A0, mem_index);
594 tcg_gen_qemu_ld16s(cpu_T[0], cpu_A0, mem_index);
598 tcg_gen_qemu_ld32s(cpu_T[0], cpu_A0, mem_index);
629 gen_op_ld_v(idx, cpu_T[0], cpu_A0);
634 gen_op_ld_v(idx, cpu_T[0], cpu_A0);
639 gen_op_ld_v(idx, cpu_T[1], cpu_A0);
667 gen_op_st_v(idx, cpu_T[0], cpu_A0);
672 gen_op_st_v(idx, cpu_T[1], cpu_A0);
1754 tcg_gen_mov_tl(a0, cpu_A0);
1844 tcg_gen_mov_tl(a0, cpu_A0);
1977 tcg_gen_mov_tl(a0, cpu_A0);
2643 tcg_gen_mov_tl(cpu_T[1], cpu_A0);
2648 tcg_gen_mov_tl(cpu_T[1], cpu_A0);
2738 tcg_gen_mov_tl(cpu_T[1], cpu_A0);
2751 tcg_gen_mov_tl(cpu_T[1], cpu_A0);
2769 tcg_gen_mov_tl(cpu_T[1], cpu_A0);
2796 tcg_gen_mov_tl(cpu_T[1], cpu_A0);
2820 tcg_gen_mov_tl(cpu_T[1], cpu_A0);
2909 tcg_gen_qemu_ld64(cpu_tmp1_i64, cpu_A0, mem_index);
2917 tcg_gen_qemu_st64(cpu_tmp1_i64, cpu_A0, mem_index);
2923 tcg_gen_qemu_ld64(cpu_tmp1_i64, cpu_A0, mem_index);
2925 tcg_gen_addi_tl(cpu_tmp0, cpu_A0, 8);
2934 tcg_gen_qemu_st64(cpu_tmp1_i64, cpu_A0, mem_index);
2935 tcg_gen_addi_tl(cpu_tmp0, cpu_A0, 8);
3902 tcg_gen_qemu_ld32u(cpu_tmp0, cpu_A0,
3909 tcg_gen_qemu_ld16u(cpu_tmp0, cpu_A0,
4003 tcg_gen_qemu_st8(cpu_T[0], cpu_A0,
4012 tcg_gen_qemu_st16(cpu_T[0], cpu_A0,
4024 tcg_gen_qemu_st32(cpu_T[0], cpu_A0,
4034 tcg_gen_qemu_st64(cpu_tmp1_i64, cpu_A0,
4047 tcg_gen_qemu_st32(cpu_T[0], cpu_A0,
4054 tcg_gen_qemu_ld8u(cpu_tmp0, cpu_A0,
4065 tcg_gen_qemu_ld32u(cpu_tmp0, cpu_A0,
4094 tcg_gen_qemu_ld32u(cpu_tmp0, cpu_A0,
4105 tcg_gen_qemu_ld64(cpu_tmp1_i64, cpu_A0,
4253 sse_fn_eppt(cpu_env, cpu_ptr0, cpu_ptr1, cpu_A0);
5065 tcg_gen_mov_tl(a0, cpu_A0);
5109 gen_helper_cmpxchg16b(cpu_env, cpu_A0);
5118 gen_helper_cmpxchg8b(cpu_env, cpu_A0);
5445 tcg_gen_add_tl(cpu_A0, cpu_A0, cpu_T[0]);
5452 tcg_gen_add_tl(cpu_A0, cpu_A0, cpu_T[0]);
5456 tcg_gen_andi_tl(cpu_A0, cpu_A0, 0xffffffff);
5685 tcg_gen_qemu_ld64(cpu_tmp1_i64, cpu_A0,
5724 tcg_gen_qemu_ld64(cpu_tmp1_i64, cpu_A0,
5746 tcg_gen_qemu_st64(cpu_tmp1_i64, cpu_A0,
5772 tcg_gen_qemu_st64(cpu_tmp1_i64, cpu_A0,
5791 cpu_A0, tcg_const_i32(s->dflag));
5801 gen_helper_fstenv(cpu_env, cpu_A0, tcg_const_i32(s->dflag));
5811 gen_helper_fldt_ST0(cpu_env, cpu_A0);
5816 gen_helper_fstt_ST0(cpu_env, cpu_A0);
5822 gen_helper_frstor(cpu_env, cpu_A0, tcg_const_i32(s->dflag));
5827 gen_helper_fsave(cpu_env, cpu_A0, tcg_const_i32(s->dflag));
5837 gen_helper_fbld_ST0(cpu_env, cpu_A0);
5842 gen_helper_fbst_ST0(cpu_env, cpu_A0);
5846 tcg_gen_qemu_ld64(cpu_tmp1_i64, cpu_A0,
5852 tcg_gen_qemu_st64(cpu_tmp1_i64, cpu_A0,
6527 gen_op_ld_v(ot + s->mem_index, t0, cpu_A0);
6707 tcg_gen_add_tl(cpu_A0, cpu_A0, cpu_tmp0);
6931 gen_helper_boundw(cpu_env, cpu_A0, cpu_tmp2_i32);
6933 gen_helper_boundl(cpu_env, cpu_A0, cpu_tmp2_i32);
7203 gen_helper_monitor(cpu_env, cpu_A0);
7377 gen_helper_invlpg(cpu_env, cpu_A0);
7441 gen_op_ld_v(ot + s->mem_index, t0, cpu_A0);
7456 gen_op_st_v(ot + s->mem_index, t0, cpu_A0);
7625 gen_helper_fxsave(cpu_env, cpu_A0, tcg_const_i32((s->dflag == 2)));
7638 gen_helper_fxrstor(cpu_env, cpu_A0, tcg_const_i32((s->dflag == 2)));
7833 cpu_A0 = tcg_temp_new();