Cross Reference: /external/qemu/target-i386/translate.c

Lines Matching defs:cpu_tmp0
82 static TCGv cpu_tmp0, cpu_tmp4;
377         tcg_gen_movi_tl(cpu_tmp0, 0);
378         tcg_gen_st32_tl(cpu_tmp0, cpu_env, offsetof(CPUX86State, regs[reg]) + REG_LH_OFFSET);
413         tcg_gen_movi_tl(cpu_tmp0, 0);
414         tcg_gen_st32_tl(cpu_tmp0, cpu_env, offsetof(CPUX86State, regs[reg]) + REG_LH_OFFSET);
487         tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUX86State, regs[reg]));
488         tcg_gen_addi_tl(cpu_tmp0, cpu_tmp0, val);
489         tcg_gen_st16_tl(cpu_tmp0, cpu_env, offsetof(CPUX86State, regs[reg]) + REG_W_OFFSET);
492         tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUX86State, regs[reg]));
493         tcg_gen_addi_tl(cpu_tmp0, cpu_tmp0, val);
495         tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, 0xffffffff);
497         tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUX86State, regs[reg]));
501         tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUX86State, regs[reg]));
502         tcg_gen_addi_tl(cpu_tmp0, cpu_tmp0, val);
503         tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUX86State, regs[reg]));
513         tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUX86State, regs[reg]));
514         tcg_gen_add_tl(cpu_tmp0, cpu_tmp0, cpu_T[0]);
515         tcg_gen_st16_tl(cpu_tmp0, cpu_env, offsetof(CPUX86State, regs[reg]) + REG_W_OFFSET);
518         tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUX86State, regs[reg]));
519         tcg_gen_add_tl(cpu_tmp0, cpu_tmp0, cpu_T[0]);
521         tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, 0xffffffff);
523         tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUX86State, regs[reg]));
527         tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUX86State, regs[reg]));
528         tcg_gen_add_tl(cpu_tmp0, cpu_tmp0, cpu_T[0]);
529         tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUX86State, regs[reg]));
537     tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUX86State, regs[reg]));
539         tcg_gen_shli_tl(cpu_tmp0, cpu_tmp0, shift);
540     tcg_gen_add_tl(cpu_A0, cpu_A0, cpu_tmp0);
553     tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUX86State, segs[reg].base));
554     tcg_gen_add_tl(cpu_A0, cpu_A0, cpu_tmp0);
568     tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUX86State, segs[reg].base));
569     tcg_gen_add_tl(cpu_A0, cpu_A0, cpu_tmp0);
579     tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUX86State, regs[reg]));
581         tcg_gen_shli_tl(cpu_tmp0, cpu_tmp0, shift);
582     tcg_gen_add_tl(cpu_A0, cpu_A0, cpu_tmp0);
677     tcg_gen_movi_tl(cpu_tmp0, pc);
678     tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUX86State, eip));
786     tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUX86State, regs[R_ECX]));
787     gen_extu(size + 1, cpu_tmp0);
788     tcg_gen_brcondi_tl(TCG_COND_NE, cpu_tmp0, 0, label1);
793     tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUX86State, regs[R_ECX]));
794     gen_extu(size + 1, cpu_tmp0);
795     tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_tmp0, 0, label1);
928         t1 = gen_ext_tl(cpu_tmp0, cpu_cc_src, size, false);
930         t0 = TCGV_EQUAL(t1, cpu_cc_src) ? cpu_tmp0 : reg;
938         t1 = gen_ext_tl(cpu_tmp0, cpu_cc_src, size, false);
948         t1 = gen_ext_tl(cpu_tmp0, cpu_cc_src, size, false);
950             tcg_gen_mov_tl(cpu_tmp0, cpu_cc_src);
951             t1 = cpu_tmp0;
963         t1 = gen_ext_tl(cpu_tmp0, cpu_cc_src, size, false);
1109         tcg_gen_shri_tl(cpu_tmp0, cpu_cc_src, 7); /* CC_S */
1110         tcg_gen_xor_tl(reg, reg, cpu_tmp0);
1118         tcg_gen_shri_tl(cpu_tmp0, cpu_cc_src, 6); /* CC_Z */
1120         tcg_gen_or_tl(reg, reg, cpu_tmp0);
1201             t0 = gen_ext_tl(cpu_tmp0, cpu_cc_dst, size, false);
1206             t0 = gen_ext_tl(cpu_tmp0, cpu_cc_dst, size, true);
1218             t0 = gen_ext_tl(cpu_tmp0, cpu_cc_src, size, false);
1230             t0 = gen_ext_tl(cpu_tmp0, cpu_cc_src, size, true);
1770         tcg_gen_andi_tl(cpu_tmp0, t1, (1 << (3 + ot)) - 1);
1772         tcg_gen_mov_tl(cpu_tmp0, t1);
1781         tcg_gen_shr_tl(cpu_tmp4, t0, cpu_tmp0);
1782         tcg_gen_sub_tl(cpu_tmp0, tcg_const_tl(data_bits), cpu_tmp0);
1783         tcg_gen_shl_tl(t0, t0, cpu_tmp0);
1785         tcg_gen_shl_tl(cpu_tmp4, t0, cpu_tmp0);
1786         tcg_gen_sub_tl(cpu_tmp0, tcg_const_tl(data_bits), cpu_tmp0);
1787         tcg_gen_shr_tl(t0, t0, cpu_tmp0);
1807     tcg_gen_xor_tl(cpu_tmp0, t2, t0);
1808     tcg_gen_lshift(cpu_tmp0, cpu_tmp0, 11 - (data_bits - 1));
1809     tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, CC_O);
1810     tcg_gen_or_tl(cpu_cc_src, cpu_cc_src, cpu_tmp0);
1881         tcg_gen_xor_tl(cpu_tmp0, t1, t0);
1882         tcg_gen_lshift(cpu_tmp0, cpu_tmp0, 11 - (data_bits - 1));
1883         tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, CC_O);
1884         tcg_gen_or_tl(cpu_cc_src, cpu_cc_src, cpu_tmp0);
1998             tcg_gen_shli_tl(cpu_tmp0, t1, 16);
1999             tcg_gen_or_tl(t0, t0, cpu_tmp0);
2006             tcg_gen_shl_tl(cpu_tmp0, t0, cpu_tmp5);
2010             tcg_gen_or_tl(t0, t0, cpu_tmp0);
2019             tcg_gen_sub_tl(cpu_tmp0, tcg_const_tl(32), cpu_tmp5);
2020             tcg_gen_shr_tl(cpu_tmp6, t1, cpu_tmp0);
2925     tcg_gen_addi_tl(cpu_tmp0, cpu_A0, 8);
2926     tcg_gen_qemu_ld64(cpu_tmp1_i64, cpu_tmp0, mem_index);
2935     tcg_gen_addi_tl(cpu_tmp0, cpu_A0, 8);
2937     tcg_gen_qemu_st64(cpu_tmp1_i64, cpu_tmp0, mem_index);
3902                         tcg_gen_qemu_ld32u(cpu_tmp0, cpu_A0,
3904                         tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_tmp0);
3909                         tcg_gen_qemu_ld16u(cpu_tmp0, cpu_A0,
3911                         tcg_gen_st16_tl(cpu_tmp0, cpu_env, op2_offset +
4054                         tcg_gen_qemu_ld8u(cpu_tmp0, cpu_A0,
4056                     tcg_gen_st8_tl(cpu_tmp0, cpu_env, offsetof(CPUX86State,
4065                         tcg_gen_qemu_ld32u(cpu_tmp0, cpu_A0,
4067                         tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_tmp0);
4092                             gen_op_mov_v_reg(ot, cpu_tmp0, rm);
4094                             tcg_gen_qemu_ld32u(cpu_tmp0, cpu_A0,
4096                         tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_tmp0);
4660                 tcg_gen_ext8s_tl(cpu_tmp0, cpu_T[0]);
4661                 tcg_gen_sub_tl(cpu_cc_src, cpu_T[0], cpu_tmp0);
4672                 tcg_gen_ext16s_tl(cpu_tmp0, cpu_T[0]);
4673                 tcg_gen_sub_tl(cpu_cc_src, cpu_T[0], cpu_tmp0);
4687                 tcg_gen_ext32s_tl(cpu_tmp0, cpu_T[0]);
4688                 tcg_gen_sub_tl(cpu_cc_src, cpu_T[0], cpu_tmp0);
4703                     tcg_gen_sari_tl(cpu_tmp0, cpu_T[0], 31);
4707                     tcg_gen_sub_tl(cpu_cc_src, cpu_T[0], cpu_tmp0);
4985                 tcg_gen_ext32s_tl(cpu_tmp0, cpu_T[0]);
4986                 tcg_gen_sub_tl(cpu_cc_src, cpu_T[0], cpu_tmp0);
4997                     tcg_gen_sari_tl(cpu_tmp0, cpu_T[0], 31);
5000                     tcg_gen_sub_tl(cpu_cc_src, cpu_T[1], cpu_tmp0);
5009             tcg_gen_ext16s_tl(cpu_tmp0, cpu_T[0]);
5010             tcg_gen_sub_tl(cpu_cc_src, cpu_T[0], cpu_tmp0);
6539                 tcg_gen_movi_tl(cpu_tmp0, 0);
6540                 tcg_gen_st32_tl(cpu_tmp0, cpu_env, offsetof(CPUX86State, regs[reg]) + REG_LH_OFFSET);
6705             tcg_gen_sari_tl(cpu_tmp0, cpu_T[1], 3 + ot);
6706             tcg_gen_shli_tl(cpu_tmp0, cpu_tmp0, ot);
6707             tcg_gen_add_tl(cpu_A0, cpu_A0, cpu_tmp0);
6721             tcg_gen_movi_tl(cpu_tmp0, 1);
6722             tcg_gen_shl_tl(cpu_tmp0, cpu_tmp0, cpu_T[1]);
6723             tcg_gen_or_tl(cpu_T[0], cpu_T[0], cpu_tmp0);
6727             tcg_gen_movi_tl(cpu_tmp0, 1);
6728             tcg_gen_shl_tl(cpu_tmp0, cpu_tmp0, cpu_T[1]);
6729             tcg_gen_not_tl(cpu_tmp0, cpu_tmp0);
6730             tcg_gen_and_tl(cpu_T[0], cpu_T[0], cpu_tmp0);
6735             tcg_gen_movi_tl(cpu_tmp0, 1);
6736             tcg_gen_shl_tl(cpu_tmp0, cpu_tmp0, cpu_T[1]);
6737             tcg_gen_xor_tl(cpu_T[0], cpu_T[0], cpu_tmp0);
7446             tcg_gen_andi_tl(cpu_tmp0, t0, 3);
7450             tcg_gen_brcond_tl(TCG_COND_GE, cpu_tmp0, t1, label1);
7486             tcg_gen_andi_tl(cpu_tmp0, cpu_cc_src, CC_Z);
7488             tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_tmp0, 0, label1);
7836     cpu_tmp0 = tcg_temp_new();