Lines Matching defs:fD

13695    // FTO{S,U}ID fD, dM
13701 UInt fD = (INSN(15,12) << 1) | bD;
13710 putFReg(fD, unop(Iop_ReinterpI32asF32,
13715 nCC(conq), fD, dM);
13718 putFReg(fD, unop(Iop_ReinterpI32asF32,
13723 nCC(conq), fD, dM);
13762 UInt fD = (INSN(15,12) << 1) | bD;
13787 if (fD + nRegs - 1 >= 32)
13834 putFReg(fD + i, loadLE(Ity_F32, addr), IRTemp_INVALID);
13836 storeLE(addr, getFReg(fD + i));
13853 nm, nCC(conq), rN, fD, fD + nRegs - 1);
13856 nm, nCC(conq), rN, fD, fD + nRegs - 1);
13859 nm, nCC(conq), rN, fD, fD + nRegs - 1);
13909 UInt fD = (INSN(15,12) << 1) | bD;
13928 putFReg(fD, loadLE(Ity_F32,mkexpr(ea)), IRTemp_INVALID);
13930 storeLE(mkexpr(ea), getFReg(fD));
13933 bL ? "ld" : "st", nCC(conq), fD, rN,
13946 UInt fD = (INSN(15,12) << 1) | bD; /* dst/acc */
13956 putFReg(fD, triop(Iop_AddF32, rm,
13957 getFReg(fD),
13960 DIP("fmacs%s s%u, s%u, s%u\n", nCC(conq), fD, fN, fM);
13963 putFReg(fD, triop(Iop_AddF32, rm,
13964 getFReg(fD),
13969 DIP("fnmacs%s s%u, s%u, s%u\n", nCC(conq), fD, fN, fM);
13972 putFReg(fD, triop(Iop_AddF32, rm,
13973 unop(Iop_NegF32, getFReg(fD)),
13976 DIP("fmscs%s s%u, s%u, s%u\n", nCC(conq), fD, fN, fM);
13979 putFReg(fD, triop(Iop_AddF32, rm,
13980 unop(Iop_NegF32, getFReg(fD)),
13986 DIP("fnmscs%s s%u, s%u, s%u\n", nCC(conq), fD, fN, fM);
13989 putFReg(fD, triop(Iop_MulF32, rm, getFReg(fN), getFReg(fM)),
13991 DIP("fmuls%s s%u, s%u, s%u\n", nCC(conq), fD, fN, fM);
13994 putFReg(fD, unop(Iop_NegF32,
13998 DIP("fnmuls%s s%u, s%u, s%u\n", nCC(conq), fD, fN, fM);
14001 putFReg(fD, triop(Iop_AddF32, rm, getFReg(fN), getFReg(fM)),
14003 DIP("fadds%s s%u, s%u, s%u\n", nCC(conq), fD, fN, fM);
14006 putFReg(fD, triop(Iop_SubF32, rm, getFReg(fN), getFReg(fM)),
14008 DIP("fsubs%s s%u, s%u, s%u\n", nCC(conq), fD, fN, fM);
14011 putFReg(fD, triop(Iop_DivF32, rm, getFReg(fN), getFReg(fM)),
14013 DIP("fdivs%s s%u, s%u, s%u\n", nCC(conq), fD, fN, fM);
14018 putFReg(fD, triop(Iop_AddF32, rm,
14019 getFReg(fD),
14023 DIP("vfmas%s s%u, s%u, s%u\n", nCC(conq), fD, fN, fM);
14028 putFReg(fD, triop(Iop_AddF32, rm,
14029 getFReg(fD),
14034 DIP("vfmss%s s%u, s%u, s%u\n", nCC(conq), fD, fN, fM);
14065 UInt fD = (INSN(15,12) << 1) | bD;
14074 assign(argL, unop(Iop_F32toF64, getFReg(fD)));
14108 DIP("fcmpz%ss%s s%u\n", bN ? "e" : "", nCC(conq), fD);
14111 nCC(conq), fD, fM);
14125 UInt fD = (INSN(15,12) << 1) | bD;
14131 putFReg(fD, getFReg(fM), condT);
14132 DIP("fcpys%s s%u, s%u\n", nCC(conq), fD, fM);
14137 putFReg(fD, unop(Iop_AbsF32, getFReg(fM)), condT);
14138 DIP("fabss%s s%u, s%u\n", nCC(conq), fD, fM);
14143 putFReg(fD, unop(Iop_NegF32, getFReg(fM)), condT);
14144 DIP("fnegs%s s%u, s%u\n", nCC(conq), fD, fM);
14150 putFReg(fD, binop(Iop_SqrtF32, rm, getFReg(fM)), condT);
14151 DIP("fsqrts%s s%u, s%u\n", nCC(conq), fD, fM);
14162 // F{S,U}ITOS fD, fM
14175 UInt fD = (INSN(15,12) << 1) | bD;
14181 putFReg(fD, binop(Iop_F64toF32,
14186 DIP("fsitos%s s%u, s%u\n", nCC(conq), fD, fM);
14189 putFReg(fD, binop(Iop_F64toF32,
14194 DIP("fuitos%s s%u, s%u\n", nCC(conq), fD, fM);
14199 // FTO{S,U}IS fD, fM
14206 UInt fD = (INSN(15,12) << 1) | bD;
14215 putFReg(fD, unop(Iop_ReinterpI32asF32,
14220 nCC(conq), fD, fM);
14224 putFReg(fD, unop(Iop_ReinterpI32asF32,
14229 nCC(conq), fD, fM);
14255 UInt fD = (INSN(15,12) << 1) | bD;
14259 putFReg(fD, binop(Iop_F64toF32, mkexpr(rmode), getDReg(dM)),
14261 DIP("fcvtsd%s s%u, d%u\n", nCC(conq), fD, dM);