Lines Matching refs:vec
1605 HReg vec = iselVecExpr(env, e->Iex.Unop.arg);
1607 addInstr(env, AMD64Instr_SseLdSt(False/*store*/, 16, vec, rsp_m16));
1618 HReg vec = iselVecExpr(env, e->Iex.Unop.arg);
1622 16, vec, m16_rsp));
1630 HReg vHi, vLo, vec;
1637 case Iop_V256to64_0: vec = vLo; off = -16; break;
1638 case Iop_V256to64_1: vec = vLo; off = -8; break;
1639 case Iop_V256to64_2: vec = vHi; off = -16; break;
1640 case Iop_V256to64_3: vec = vHi; off = -8; break;
1648 16, vec, m16_rsp));
1717 HReg vec = iselVecExpr(env, e->Iex.Unop.arg);
1723 16, vec, m16_rsp));
4385 HReg vec = iselVecExpr(env, stmt->Ist.Put.data);
4388 addInstr(env, AMD64Instr_SseLdSt(False/*store*/, 16, vec, am));