Lines Matching defs:fD

1271 ARMInstr* ARMInstr_VLdStS ( Bool isLoad, HReg fD, ARMAModeV* am ) {
1275 i->ARMin.VLdStS.fD = fD;
1355 ARMInstr* ARMInstr_VXferS ( Bool toS, HReg fD, HReg rLo ) {
1359 i->ARMin.VXferS.fD = fD;
1754 ppHRegARM(i->ARMin.VLdStS.fD);
1761 ppHRegARM(i->ARMin.VLdStS.fD);
1836 ppHRegARM(i->ARMin.VXferS.fD);
1842 ppHRegARM(i->ARMin.VXferS.fD);
2177 addHRegUse(u, HRmWrite, i->ARMin.VLdStS.fD);
2179 addHRegUse(u, HRmRead, i->ARMin.VLdStS.fD);
2231 addHRegUse(u, HRmWrite, i->ARMin.VXferS.fD);
2234 addHRegUse(u, HRmRead, i->ARMin.VXferS.fD);
2402 i->ARMin.VLdStS.fD = lookupHRegRemap(m, i->ARMin.VLdStS.fD);
2445 i->ARMin.VXferS.fD = lookupHRegRemap(m, i->ARMin.VXferS.fD);
3538 UInt fD = fregNo(i->ARMin.VLdStS.fD);
3544 UInt bD = fD & 1;
3549 insn = XXXXXX__(0xE,X1101,BITS4(bU,bD,0,bL),rN, (fD >> 1), X1010);
3626 UInt fD = fregNo(i->ARMin.VUnaryS.dst);
3631 insn = XXXXXXXX(0xE, X1110, BITS4(1,(fD & 1),1,1), X0000,
3632 (fD >> 1), X1010, BITS4(0,1,(fM & 1),0),
3636 insn = XXXXXXXX(0xE, X1110, BITS4(1,(fD & 1),1,1), X0000,
3637 (fD >> 1), X1010, BITS4(1,1,(fM & 1),0),
3641 insn = XXXXXXXX(0xE, X1110, BITS4(1,(fD & 1),1,1), X0001,
3642 (fD >> 1), X1010, BITS4(0,1,(fM & 1),0),
3646 insn = XXXXXXXX(0xE, X1110, BITS4(1,(fD & 1),1,1), X0001,
3647 (fD >> 1), X1010, BITS4(1,1,(fM & 1),0),
3675 UInt fD = fregNo(i->ARMin.VCMovS.dst);
3678 UInt insn = XXXXXXXX(cc, X1110, BITS4(1,(fD & 1),1,1),
3679 X0000,(fD >> 1),X1010,
3694 UInt fD = fregNo(i->ARMin.VCvtSD.dst);
3696 UInt insn = XXXXXXXX(0xE, X1110, BITS4(1,(fD & 1),1,1),
3697 X0111, (fD >> 1),
3720 UInt fD = fregNo(i->ARMin.VXferS.fD);
3722 /* vmov fD, rLo is
3723 E E 0 fD[4:1] rLo A (fD[0],0,0,1) 0
3724 vmov rLo, fD is
3725 E E 1 fD[4:1] rLo A (fD[0],0,0,1) 0
3729 (fD >> 1) & 0xF, rLo, 0xA,
3730 BITS4((fD & 1),0,0,1), 0);