Cross Reference: /external/valgrind/main/VEX/priv/host_mips

Lines Matching defs:r_dst
325 static MIPSInstr *mk_iMOVds_RR(HReg r_dst, HReg r_src)
327    vassert(hregClass(r_dst) == hregClass(r_src));
329    return MIPSInstr_Alu(Malu_OR, r_dst, r_src, MIPSRH_Reg(r_src));
808          HReg r_dst = newVRegI(env);
816                                       r_dst, am_addr, mode64));
817          return r_dst;
876             HReg r_dst = newVRegI(env);
897             addInstr(env, MIPSInstr_Alu(aluOp, r_dst, r_srcL, ri_srcR));
898             return r_dst;
922             HReg r_dst = newVRegI(env);
949                                                r_dst, r_srcL_se, ri_srcR));
952                                                r_dst, r_srcL, ri_srcR));
956                                             r_dst, r_srcL, ri_srcR));
959             return r_dst;
1046             HReg r_dst = newVRegI(env);
1057             addInstr(env, mk_iMOVds_RR(r_dst, argL));
1058             addInstr(env, MIPSInstr_MoveCond(MMoveCond_movn, r_dst, argR, tmp));
1059             return r_dst;
1064             HReg r_dst = newVRegI(env);
1070                                        r_dst, r_srcL, r_srcR));
1071             return r_dst;
1075             HReg r_dst = newVRegI(env);
1090                                         r_dst, r_srcL, r_srcR));
1102             addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, tHi_1,
1105             return r_dst;
1199             HReg r_dst = newVRegI(env);
1216             addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, tHi_1,
1219             return r_dst;
1228             HReg r_dst = newVRegI(env);
1246                or  r_dst, tHi_1, tLo_1 */
1251             addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, tHi_1,
1253             return r_dst;
1262             HReg r_dst = newVRegI(env);
1271             addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, tHi_1,
1274             return r_dst;
1302             HReg r_dst = newVRegI(env);
1310                mfc1 r_dst, valS */
1311             addInstr(env, MIPSInstr_FpGpMove(MFpGpMove_mfc1, r_dst, valS));
1313             return r_dst;
1376             HReg r_dst = newVRegI(env);
1421             addInstr(env, MIPSInstr_Shft(Mshft_SLL, sz32, r_dst, r_src,
1423             addInstr(env, MIPSInstr_Shft(Mshft_SRA, sz32, r_dst, r_dst,
1425             return r_dst;
1430             HReg r_dst = newVRegI(env);
1434             addInstr(env, MIPSInstr_LI(r_dst, 0x1));
1435             addInstr(env, MIPSInstr_Alu(Malu_SUB, r_dst, r_dst, r_srcR));
1436             return r_dst;
1443             HReg r_dst = newVRegI(env);
1447             addInstr(env, MIPSInstr_Alu(Malu_NOR, r_dst, r_srcL, r_srcR));
1448             return r_dst;
1453             HReg r_dst = newVRegI(env);
1456                mfc1 r_dst, fr_src */
1457             addInstr(env, MIPSInstr_FpGpMove(MFpGpMove_mfc1, r_dst, fr_src));
1459             return r_dst;
1465             HReg r_dst = newVRegI(env);
1468                mfc1 r_dst, fr_src */
1469             addInstr(env, MIPSInstr_FpGpMove(MFpGpMove_dmfc1, r_dst, fr_src));
1471             return r_dst;
1481             HReg r_dst = newVRegI(env);
1488                mfc1 r_dst, valS */
1489             addInstr(env, MIPSInstr_FpGpMove(MFpGpMove_mfc1, r_dst, valS));
1491             return r_dst;
1501             HReg r_dst = newVRegI(env);
1504                                          r_dst, r_src, MIPSRH_Imm(False, 16)));
1505             return r_dst;
1511             HReg r_src, r_dst;
1513             r_dst = newVRegI(env);
1515             addInstr(env, MIPSInstr_Alu(Malu_AND, r_dst, r_src,
1517             return r_dst;
1521             HReg r_dst = newVRegI(env);
1524                                          r_dst, r_src, MIPSRH_Imm(False, 8)));
1525             return r_dst;
1536             HReg r_dst = newVRegI(env);
1561             addInstr(env, MIPSInstr_Alu(Malu_AND, r_dst, r_src,
1563             return r_dst;
1567             HReg r_dst = newVRegI(env);
1571                                          r_dst, r_src, MIPSRH_Imm(False, 32)));
1573                                          r_dst, r_dst, MIPSRH_Imm(False, 32)));
1574             return r_dst;
1579                HReg r_dst = newVRegI(env);
1582                        r_dst, r_src, MIPSRH_Imm(True, 32)));
1583                return r_dst;
1593                HReg r_dst = newVRegI(env);
1594                r_dst = iselWordExpr_R(env, e->Iex.Unop.arg);
1595                return r_dst;
1605             HReg r_dst = newVRegI(env);
1606             r_dst = iselWordExpr_R(env, e->Iex.Unop.arg);
1607             return r_dst;
1611             HReg r_dst = newVRegI(env);
1615                                          r_dst, r_src, MIPSRH_Imm(True, 0)));
1616             return r_dst;
1621             HReg r_dst = newVRegI(env);
1628             addInstr(env, MIPSInstr_Cmp(False, True, r_dst, tmp,
1630             return r_dst;
1634             HReg r_dst = newVRegI(env);
1637             addInstr(env, MIPSInstr_Cmp(False, True, r_dst, r_src,
1639             return r_dst;
1643             HReg r_dst = newVRegI(env);
1646             addInstr(env, MIPSInstr_Alu(Malu_SUB, r_dst, hregMIPS_GPR0(mode64),
1649             addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, r_dst,
1651             addInstr(env, MIPSInstr_Shft(Mshft_SRA, True, r_dst, r_dst,
1653             return r_dst;
1662             HReg r_dst = newVRegI(env);
1665             addInstr(env, MIPSInstr_Alu(op, r_dst,
1668             addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, r_dst,
1670             return r_dst;
1676             HReg r_dst = newVRegI(env);
1679             addInstr(env, MIPSInstr_Unary(op, r_dst, r_src));
1680             return r_dst;
1685             HReg r_dst = newVRegI(env);
1694             addInstr(env, MIPSInstr_Cmp(False, !(env->mode64), r_dst, r_src,
1696             return r_dst;
1775          HReg r_dst = newVRegI(env);
1779          addInstr(env, MIPSInstr_Load(toUChar(sizeofIRType(ty)), r_dst, am_addr,
1781          return r_dst;
1791          HReg r_dst  = iselWordExpr_R(env, e->Iex.ITE.iffalse);
1795           * r_dst = r0
1796           * movn r_dst, r1, r_cond
1798          addInstr(env, MIPSInstr_MoveCond(MMoveCond_movn, r_dst, r1, r_cond));
1799          return r_dst;
1808       HReg r_dst = newVRegI(env);
1828       addInstr(env, MIPSInstr_LI(r_dst, (ULong) l));
1829       return r_dst;
1834       HReg r_dst = newVRegI(env);
1852       addInstr(env, mk_iMOVds_RR(r_dst, hregMIPS_GPR2(mode64)));
1853       return r_dst;
2124       HReg r_dst = newVRegI(env);
2128       addInstr(env, MIPSInstr_LI(r_dst, 0x1));
2129       addInstr(env, MIPSInstr_Alu(Malu_SUB, r_dst, r_dst, r_srcR));
2136                r_dst, mode64));
2140       HReg r_dst = iselWordExpr_R_wrk(env, e);
2147                r_dst, mode64));
2198             HReg r_dst = newVRegI(env);
2202                                         r_dst, r_srcL, r_srcR));
2429             HReg r_dst = newVRegI(env);
2436                                         r_dst, r_srcL, r_srcR));
2984       HReg r_dst;
2987          r_dst = newVRegD(env);
2988          addInstr(env, MIPSInstr_FpLdSt(True /*load */, 8, r_dst, am_addr));
2990          r_dst = newVRegF(env);
2991          addInstr(env, MIPSInstr_FpLdSt(True /*load */, 4, r_dst, am_addr));
2993       return r_dst;
2999       HReg r_dst;
3001          r_dst = newVRegD(env);
3002          addInstr(env, MIPSInstr_FpLdSt(True /*load */, 8, r_dst, am_addr));
3004          r_dst = newVRegF(env);
3005          addInstr(env, MIPSInstr_FpLdSt(True /*load */, 4, r_dst, am_addr));
3007       return r_dst;
3014          HReg r_dst = newVRegF(env);
3017             mtc1 r_dst, valS */
3018          addInstr(env, MIPSInstr_FpGpMove(MFpGpMove_mtc1, r_dst, fr_src));
3020          return r_dst;
3031          HReg r_dst;
3034             r_dst = newVRegF(env);
3036                dmtc1 r_dst, fr_src */
3037             addInstr(env, MIPSInstr_FpGpMove(MFpGpMove_dmtc1, r_dst, fr_src));
3040              r_dst = newVRegD(env);
3042              r_dst = mk_LoadRR32toFPR(env, Hi, Lo);  /* 2*I32 -> F64 */
3044          return r_dst;
3204             HReg r_dst = newVRegF(env);
3213             addInstr(env, MIPSInstr_FpConvert(Mfp_CVTSW, r_dst, tmp));
3216             return r_dst;
3220             HReg r_dst = newVRegF(env);
3246             addInstr(env, MIPSInstr_FpConvert(Mfp_CVTDL, r_dst, tmp));
3249             return r_dst;
3253             HReg r_dst = newVRegF(env);
3279             addInstr(env, MIPSInstr_FpConvert(Mfp_CVTSL, r_dst, tmp));
3282             return r_dst;
3391          HReg r_dst = newVRegF(env);
3392          addInstr(env, MIPSInstr_FpUnary(Mfp_MOVD, r_dst, r0));
3393          addInstr(env, MIPSInstr_MoveCond(MFpMoveCond_movnd, r_dst, r1,
3395          return r_dst;
3425       HReg r_dst = newVRegD(env);
3429       addInstr(env, MIPSInstr_FpLdSt(True /*load */ , 8, r_dst, am_addr));
3430       return r_dst;
3436       HReg r_dst = newVRegD(env);
3439       addInstr(env, MIPSInstr_FpLdSt(True /*load */ , 8, r_dst, am_addr));
3440       return r_dst;
3610          HReg r_dst = newVRegD(env);
3612          addInstr(env, MIPSInstr_FpUnary(Mfp_MOVD, r_dst, r0));
3613          addInstr(env, MIPSInstr_MoveCond(MFpMoveCond_movnd, r_dst, r1,
3615          return r_dst;
3742             HReg r_dst = lookupIRTemp(env, tmp);
3744             addInstr(env, mk_iMOVds_RR(r_dst, r_src));
3750                HReg r_dst = lookupIRTemp(env, tmp);
3752                addInstr(env, mk_iMOVds_RR(r_dst, r_src));
3839                HReg r_dst = lookupIRTemp(env, d->tmp);
3840                addInstr(env, mk_iMOVds_RR(r_dst, hregMIPS_GPR2(mode64)));
3849                   HReg r_dst = lookupIRTemp(env, d->tmp);
3850                   addInstr(env, mk_iMOVds_RR(r_dst, hregMIPS_GPR2(mode64)));
3906             HReg r_dst = lookupIRTemp(env, res);
3908                addInstr(env, MIPSInstr_LoadL(4, r_dst, r_addr, mode64));
3911                addInstr(env, MIPSInstr_LoadL(8, r_dst, r_addr, mode64));
3919             HReg r_dst = lookupIRTemp(env, res);
3924                addInstr(env, mk_iMOVds_RR(r_dst, r_src));
3925                addInstr(env, MIPSInstr_StoreC(4, r_addr, r_dst, mode64));
3928                addInstr(env, mk_iMOVds_RR(r_dst, r_src));
3929                addInstr(env, MIPSInstr_StoreC(8, r_addr, r_dst, mode64));