Lines Matching defs:regs
227 struct vki_user_regs_struct *regs;
245 regs = (struct vki_user_regs_struct *)&(prs->pr_reg);
247 regs = (struct vki_user_regs_struct *)prs->pr_reg;
248 vg_assert(sizeof(*regs) == sizeof(prs->pr_reg));
252 regs->eflags = LibVEX_GuestX86_get_eflags( &arch->vex );
253 regs->esp = arch->vex.guest_ESP;
254 regs->eip = arch->vex.guest_EIP;
256 regs->ebx = arch->vex.guest_EBX;
257 regs->ecx = arch->vex.guest_ECX;
258 regs->edx = arch->vex.guest_EDX;
259 regs->esi = arch->vex.guest_ESI;
260 regs->edi = arch->vex.guest_EDI;
261 regs->ebp = arch->vex.guest_EBP;
262 regs->eax = arch->vex.guest_EAX;
264 regs->cs = arch->vex.guest_CS;
265 regs->ds = arch->vex.guest_DS;
266 regs->ss = arch->vex.guest_SS;
267 regs->es = arch->vex.guest_ES;
268 regs->fs = arch->vex.guest_FS;
269 regs->gs = arch->vex.guest_GS;
272 regs->eflags = LibVEX_GuestAMD64_get_rflags( &arch->vex );
273 regs->rsp = arch->vex.guest_RSP;
274 regs->rip = arch->vex.guest_RIP;
276 regs->rbx = arch->vex.guest_RBX;
277 regs->rcx = arch->vex.guest_RCX;
278 regs->rdx = arch->vex.guest_RDX;
279 regs->rsi = arch->vex.guest_RSI;
280 regs->rdi = arch->vex.guest_RDI;
281 regs->rbp = arch->vex.guest_RBP;
282 regs->rax = arch->vex.guest_RAX;
283 regs->r8 = arch->vex.guest_R8;
284 regs->r9 = arch->vex.guest_R9;
285 regs->r10 = arch->vex.guest_R10;
286 regs->r11 = arch->vex.guest_R11;
287 regs->r12 = arch->vex.guest_R12;
288 regs->r13 = arch->vex.guest_R13;
289 regs->r14 = arch->vex.guest_R14;
290 regs->r15 = arch->vex.guest_R15;
293 # define DO(n) regs->gpr[n] = arch->vex.guest_GPR##n
300 regs->nip = arch->vex.guest_CIA;
301 regs->msr = 0xf032; /* pretty arbitrary */
302 regs->orig_gpr3 = arch->vex.guest_GPR3;
303 regs->ctr = arch->vex.guest_CTR;
304 regs->link = arch->vex.guest_LR;
305 regs->xer = LibVEX_GuestPPC32_get_XER( &arch->vex );
306 regs->ccr = LibVEX_GuestPPC32_get_CR( &arch->vex );
307 regs->mq = 0;
308 regs->trap = 0;
309 regs->dar = 0; /* should be fault address? */
310 regs->dsisr = 0;
311 regs->result = 0;
314 # define DO(n) regs->gpr[n] = arch->vex.guest_GPR##n
321 regs->nip = arch->vex.guest_CIA;
322 regs->msr = 0xf032; /* pretty arbitrary */
323 regs->orig_gpr3 = arch->vex.guest_GPR3;
324 regs->ctr = arch->vex.guest_CTR;
325 regs->link = arch->vex.guest_LR;
326 regs->xer = LibVEX_GuestPPC64_get_XER( &arch->vex );
327 regs->ccr = LibVEX_GuestPPC64_get_CR( &arch->vex );
328 /* regs->mq = 0; */
329 regs->trap = 0;
330 regs->dar = 0; /* should be fault address? */
331 regs->dsisr = 0;
332 regs->result = 0;
335 regs->ARM_r0 = arch->vex.guest_R0;
336 regs->ARM_r1 = arch->vex.guest_R1;
337 regs->ARM_r2 = arch->vex.guest_R2;
338 regs->ARM_r3 = arch->vex.guest_R3;
339 regs->ARM_r4 = arch->vex.guest_R4;
340 regs->ARM_r5 = arch->vex.guest_R5;
341 regs->ARM_r6 = arch->vex.guest_R6;
342 regs->ARM_r7 = arch->vex.guest_R7;
343 regs->ARM_r8 = arch->vex.guest_R8;
344 regs->ARM_r9 = arch->vex.guest_R9;
345 regs->ARM_r10 = arch->vex.guest_R10;
346 regs->ARM_fp = arch->vex.guest_R11;
347 regs->ARM_ip = arch->vex.guest_R12;
348 regs->ARM_sp = arch->vex.guest_R13;
349 regs->ARM_lr = arch->vex.guest_R14;
350 regs->ARM_pc = arch->vex.guest_R15T;
351 regs->ARM_cpsr = LibVEX_GuestARM_get_cpsr( &arch->vex );
358 # define DO(n) regs->gprs[n] = arch->vex.guest_r##n
362 # define DO(n) regs->acrs[n] = arch->vex.guest_a##n
366 regs->orig_gpr2 = arch->vex.guest_r2;
369 # define DO(n) regs->MIPS_r##n = arch->vex.guest_r##n
375 regs->MIPS_hi = arch->vex.guest_HI;
376 regs->MIPS_lo = arch->vex.guest_LO;
379 # define DO(n) regs->MIPS_r##n = arch->vex.guest_r##n
385 regs->MIPS_hi = arch->vex.guest_HI;
386 regs->MIPS_lo = arch->vex.guest_LO;