Cross Reference: /external/vixl/src/a64/macro-assembler-a64.cc

Lines Matching refs:rn
50                          const Register& rn,
53   LogicalMacro(rd, rn, operand, AND);
58                           const Register& rn,
61   LogicalMacro(rd, rn, operand, ANDS);
65 void MacroAssembler::Tst(const Register& rn,
68   Ands(AppropriateZeroRegFor(rn), rn, operand);
73                          const Register& rn,
76   LogicalMacro(rd, rn, operand, BIC);
81                           const Register& rn,
84   LogicalMacro(rd, rn, operand, BICS);
89                          const Register& rn,
92   LogicalMacro(rd, rn, operand, ORR);
97                          const Register& rn,
100   LogicalMacro(rd, rn, operand, ORN);
105                          const Register& rn,
108   LogicalMacro(rd, rn, operand, EOR);
113                          const Register& rn,
116   LogicalMacro(rd, rn, operand, EON);
121                                   const Register& rn,
148           Mov(rd, rn);
160           Mov(rd, rn);
166           Mvn(rd, rn);
179       LogicalImmediate(rd, rn, n, imm_s, imm_r, op);
182       Register temp = temps.AcquireSameSizeAs(rn);
187         Logical(temp, rn, Operand(temp), op);
190         Logical(rd, rn, Operand(temp), op);
202     Register temp = temps.AcquireSameSizeAs(rn);
205     Logical(rd, rn, Operand(temp), op);
209     Logical(rd, rn, operand, op);
386 void MacroAssembler::Ccmp(const Register& rn,
392     ConditionalCompareMacro(rn, -operand.immediate(), nzcv, cond, CCMN);
394     ConditionalCompareMacro(rn, operand, nzcv, cond, CCMP);
399 void MacroAssembler::Ccmn(const Register& rn,
405     ConditionalCompareMacro(rn, -operand.immediate(), nzcv, cond, CCMP);
407     ConditionalCompareMacro(rn, operand, nzcv, cond, CCMN);
412 void MacroAssembler::ConditionalCompareMacro(const Register& rn,
422     ConditionalCompare(rn, operand, nzcv, cond, op);
427     Register temp = temps.AcquireSameSizeAs(rn);
429     ConditionalCompare(rn, temp, nzcv, cond, op);
435                           const Register& rn,
440   VIXL_ASSERT(!rn.IsZero());
446     Register zr = AppropriateZeroRegFor(rn);
448       csel(rd, rn, zr, cond);
450       csinc(rd, rn, zr, cond);
452       csinv(rd, rn, zr, cond);
455       Register temp = temps.AcquireSameSizeAs(rn);
457       csel(rd, rn, temp, cond);
461     csel(rd, rn, operand.reg(), cond);
465     Register temp = temps.AcquireSameSizeAs(rn);
467     csel(rd, rn, temp, cond);
473                          const Register& rn,
477     AddSubMacro(rd, rn, -operand.immediate(), LeaveFlags, SUB);
479     AddSubMacro(rd, rn, operand, LeaveFlags, ADD);
485                           const Register& rn,
489     AddSubMacro(rd, rn, -operand.immediate(), SetFlags, SUB);
491     AddSubMacro(rd, rn, operand, SetFlags, ADD);
497                          const Register& rn,
501     AddSubMacro(rd, rn, -operand.immediate(), LeaveFlags, ADD);
503     AddSubMacro(rd, rn, operand, LeaveFlags, SUB);
509                           const Register& rn,
513     AddSubMacro(rd, rn, -operand.immediate(), SetFlags, ADD);
515     AddSubMacro(rd, rn, operand, SetFlags, SUB);
520 void MacroAssembler::Cmn(const Register& rn, const Operand& operand) {
522   Adds(AppropriateZeroRegFor(rn), rn, operand);
526 void MacroAssembler::Cmp(const Register& rn, const Operand& operand) {
528   Subs(AppropriateZeroRegFor(rn), rn, operand);
601                                  const Register& rn,
605   if (operand.IsZero() && rd.Is(rn) && rd.Is64Bits() && rn.Is64Bits() &&
612       (rn.IsZero() && !operand.IsShiftedRegister())                ||
615     Register temp = temps.AcquireSameSizeAs(rn);
617     AddSub(rd, rn, temp, S, op);
619     AddSub(rd, rn, operand, S, op);
625                          const Register& rn,
628   AddSubWithCarryMacro(rd, rn, operand, LeaveFlags, ADC);
633                           const Register& rn,
636   AddSubWithCarryMacro(rd, rn, operand, SetFlags, ADC);
641                          const Register& rn,
644   AddSubWithCarryMacro(rd, rn, operand, LeaveFlags, SBC);
649                           const Register& rn,
652   AddSubWithCarryMacro(rd, rn, operand, SetFlags, SBC);
673                                           const Register& rn,
677   VIXL_ASSERT(rd.size() == rn.size());
683     Register temp = temps.AcquireSameSizeAs(rn);
685     AddSubWithCarry(rd, rn, Operand(temp), S, op);
693     Register temp = temps.AcquireSameSizeAs(rn);
695     AddSubWithCarry(rd, rn, Operand(temp), S, op);
705     Register temp = temps.AcquireSameSizeAs(rn);
708     AddSubWithCarry(rd, rn, Operand(temp), S, op);
711     AddSubWithCarry(rd, rn, operand, S, op);