Lines Matching refs:rt
573 unsigned rt = instr->Rt();
576 case CBZ_w: take_branch = (wreg(rt) == 0); break;
577 case CBZ_x: take_branch = (xreg(rt) == 0); break;
578 case CBNZ_w: take_branch = (wreg(rt) != 0); break;
579 case CBNZ_x: take_branch = (xreg(rt) != 0); break;
841 unsigned rt = instr->Rt();
849 // 'rt' and 'rt2' can only be aliased for stores.
850 VIXL_ASSERT(((op & LoadStorePairLBit) == 0) || (rt != rt2));
854 set_wreg(rt, MemoryRead32(address));
859 set_sreg(rt, MemoryReadFP32(address));
864 set_xreg(rt, MemoryRead64(address));
869 set_dreg(rt, MemoryReadFP64(address));
874 set_xreg(rt, ExtendValue(kXRegSize, MemoryRead32(address), SXTW));
880 MemoryWrite32(address, wreg(rt));
885 MemoryWriteFP32(address, sreg(rt));
890 MemoryWrite64(address, xreg(rt));
895 MemoryWriteFP64(address, dreg(rt));
906 unsigned rt = instr->Rt();
909 case LDR_w_lit: set_wreg(rt, MemoryRead32(address)); break;
910 case LDR_x_lit: set_xreg(rt, MemoryRead64(address)); break;
911 case LDR_s_lit: set_sreg(rt, MemoryReadFP32(address)); break;
912 case LDR_d_lit: set_dreg(rt, MemoryReadFP64(address)); break;