Searched defs:Amount (Results 1 - 15 of 15) sorted by relevance

/external/llvm/lib/Target/MSP430/
H A DMSP430FrameLowering.cpp238 uint64_t Amount = Old->getOperand(0).getImm(); local
239 if (Amount != 0) {
243 Amount = (Amount+StackAlign-1)/StackAlign*StackAlign;
249 .addReg(MSP430::SPW).addImm(Amount);
254 Amount -= CalleeAmt;
255 if (Amount)
258 .addReg(MSP430::SPW).addImm(Amount);
/external/llvm/lib/Target/Mips/
H A DMips16FrameLowering.cpp151 int64_t Amount = I->getOperand(0).getImm(); local
154 Amount = -Amount;
159 TII.adjustStackPtr(Mips::SP, Amount, MBB, I);
H A DMips16InstrInfo.cpp258 // Adjust SP by Amount bytes where bytes can be up to 32bit number.
263 void Mips16InstrInfo::adjustStackPtrBig(unsigned SP, int64_t Amount, argument
279 MIB1.addImm(Amount).addImm(-1);
290 void Mips16InstrInfo::adjustStackPtrBigUnrestricted(unsigned SP, int64_t Amount, argument
296 /// Adjust SP by Amount bytes.
297 void Mips16InstrInfo::adjustStackPtr(unsigned SP, int64_t Amount, argument
300 if (isInt<16>(Amount)) // need to change to addiu sp, ....and isInt<16>
301 BuildAddiuSpImm(MBB, I, Amount);
303 adjustStackPtrBigUnrestricted(SP, Amount, MBB, I);
464 int64_t Amount) {
463 validImmediate(unsigned Opcode, unsigned Reg, int64_t Amount) argument
[all...]
H A DMipsSEFrameLowering.cpp499 int64_t Amount = I->getOperand(0).getImm(); local
502 Amount = -Amount;
505 TII.adjustStackPtr(SP, Amount, MBB, I);
H A DMipsSEInstrInfo.cpp359 /// Adjust SP by Amount bytes.
360 void MipsSEInstrInfo::adjustStackPtr(unsigned SP, int64_t Amount, argument
368 if (isInt<16>(Amount))// addi sp, sp, amount
369 BuildMI(MBB, I, DL, get(ADDiu), SP).addReg(SP).addImm(Amount);
371 unsigned Reg = loadImmediate(Amount, MBB, I, DL, nullptr);
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/
H A Dradeon_emulate_loops.c53 float Amount; member in struct:count_inst
167 count_inst->Amount += amount;
174 count_inst->Amount -= amount;
232 count_inst.Amount = 0.0f;
272 if(count_inst.Amount == 0.0f){
275 DBG("Counter is increased by %f each iteration.\n", count_inst.Amount);
289 count_inst.Amount);
295 count_inst.Amount) + 1;
/external/llvm/lib/Target/ARM/
H A DThumb1FrameLowering.cpp64 unsigned Amount = Old->getOperand(0).getImm(); local
65 if (Amount != 0) {
70 Amount = (Amount+Align-1)/Align*Align;
75 emitSPUpdate(MBB, I, TII, dl, *RegInfo, -Amount);
78 emitSPUpdate(MBB, I, TII, dl, *RegInfo, Amount);
H A DARMFrameLowering.cpp1638 unsigned Amount = Old->getOperand(0).getImm(); local
1639 if (Amount != 0) {
1644 Amount = (Amount+Align-1)/Align*Align;
1659 emitSPUpdate(isARM, MBB, I, dl, TII, -Amount, MachineInstr::NoFlags,
1665 emitSPUpdate(isARM, MBB, I, dl, TII, Amount, MachineInstr::NoFlags,
/external/mesa3d/src/gallium/drivers/r300/compiler/
H A Dradeon_emulate_loops.c53 float Amount; member in struct:count_inst
167 count_inst->Amount += amount;
174 count_inst->Amount -= amount;
232 count_inst.Amount = 0.0f;
272 if(count_inst.Amount == 0.0f){
275 DBG("Counter is increased by %f each iteration.\n", count_inst.Amount);
289 count_inst.Amount);
295 count_inst.Amount) + 1;
/external/llvm/lib/Target/AArch64/
H A DAArch64FrameLowering.cpp122 int64_t Amount = I->getOperand(0).getImm(); local
123 Amount = RoundUpToAlignment(Amount, Align);
125 Amount = -Amount;
141 assert(Amount > -0xffffff && Amount < 0xffffff && "call frame too large");
142 emitFrameOffset(MBB, I, DL, AArch64::SP, AArch64::SP, Amount, TII);
/external/llvm/lib/Target/XCore/
H A DXCoreFrameLowering.cpp487 uint64_t Amount = Old->getOperand(0).getImm(); local
488 if (Amount != 0) {
493 Amount = (Amount+Align-1)/Align*Align;
495 assert(Amount%4 == 0);
496 Amount /= 4;
498 bool isU6 = isImmU6(Amount);
499 if (!isU6 && !isImmU16(Amount)) {
503 << Amount << "\n";
512 .addImm(Amount);
[all...]
/external/llvm/include/llvm/Analysis/
H A DBlockFrequencyInfoImpl.h335 uint64_t Amount; member in struct:llvm::BlockFrequencyInfoImplBase::Weight
336 Weight() : Type(Local), Amount(0) {}
354 void addLocal(const BlockNode &Node, uint64_t Amount) { argument
355 add(Node, Amount, Weight::Local);
357 void addExit(const BlockNode &Node, uint64_t Amount) { argument
358 add(Node, Amount, Weight::Exit);
360 void addBackedge(const BlockNode &Node, uint64_t Amount) { argument
361 add(Node, Amount, Weight::Backedge);
376 void add(const BlockNode &Node, uint64_t Amount, Weight::DistType Type);
/external/llvm/lib/Analysis/
H A DInstructionSimplify.cpp1202 /// isUndefShift - Returns true if a shift by \c Amount always yields undef.
1203 static bool isUndefShift(Value *Amount) { argument
1204 Constant *C = dyn_cast<Constant>(Amount);
/external/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp227 unsigned Amount; member in struct:__anon25952::AArch64Operand::ShiftExtendOp
398 return ShiftExtend.Amount;
1701 Op->ShiftExtend.Amount = Val;
/external/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp4651 unsigned &Amount) {
4673 Amount = 0;
4703 Amount = Imm;
7403 unsigned Amount = ARM_AM::getSORegOffset(Inst.getOperand(2).getImm()); local
7404 if (Amount == 32) Amount = 0;
7412 TmpInst.addOperand(MCOperand::CreateImm(Amount));
4650 parseMemRegOffsetShift(ARM_AM::ShiftOpc &St, unsigned &Amount) argument

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