/external/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 282 SmallVectorImpl<CCValAssign> &ArgLocs, 336 SmallVectorImpl<CCValAssign>::iterator B = ArgLocs.begin() + FirstVal; 439 SmallVector<CCValAssign, 16> ArgLocs; local 441 getTargetMachine(), ArgLocs, *DAG.getContext()); 442 AnalyzeArguments(CCInfo, ArgLocs, Ins); 450 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 451 CCValAssign &VA = ArgLocs[i]; 585 SmallVector<CCValAssign, 16> ArgLocs; local 587 getTargetMachine(), ArgLocs, *DAG.getContext()); 588 AnalyzeArguments(CCInfo, ArgLocs, Out 281 AnalyzeArguments(CCState &State, SmallVectorImpl<CCValAssign> &ArgLocs, const SmallVectorImpl<ArgT> &Args) argument [all...] |
/external/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 1200 SmallVector<CCValAssign, 16> ArgLocs; local 1201 CCState CCInfo(CC, false, *FuncInfo.MF, TM, ArgLocs, *Context); 1213 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 1214 CCValAssign &VA = ArgLocs[i];
|
H A D | AArch64ISelLowering.cpp | 1652 SmallVector<CCValAssign, 16> ArgLocs; local 1654 getTargetMachine(), ArgLocs, *DAG.getContext()); 1685 assert(ArgLocs.size() == Ins.size()); 1687 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 1688 CCValAssign &VA = ArgLocs[i]; 2009 SmallVector<CCValAssign, 16> ArgLocs; local 2011 getTargetMachine(), ArgLocs, *DAG.getContext()); 2014 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) 2015 if (!ArgLocs[i].isRegLoc()) 2053 SmallVector<CCValAssign, 16> ArgLocs; 2151 SmallVector<CCValAssign, 16> ArgLocs; local [all...] |
/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 429 SmallVector<CCValAssign, 16> ArgLocs; local 431 getTargetMachine(), ArgLocs, *DAG.getContext(), 447 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i){ 448 CCValAssign &VA = ArgLocs[i]; 472 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 473 CCValAssign &VA = ArgLocs[i]; 845 SmallVector<CCValAssign, 16> ArgLocs; local 847 getTargetMachine(), ArgLocs, *DAG.getContext()); 860 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 861 CCValAssign &VA = ArgLocs[ [all...] |
/external/llvm/lib/Target/PowerPC/ |
H A D | PPCFastISel.cpp | 1202 SmallVector<CCValAssign, 16> ArgLocs; local 1203 CCState CCInfo(CC, IsVarArg, *FuncInfo.MF, TM, ArgLocs, *Context); 1212 for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) { 1213 CCValAssign &VA = ArgLocs[I]; 1249 for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) { 1250 CCValAssign &VA = ArgLocs[I];
|
H A D | PPCISelLowering.cpp | 2242 SmallVector<CCValAssign, 16> ArgLocs; local 2244 getTargetMachine(), ArgLocs, *DAG.getContext()); 2252 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 2253 CCValAssign &VA = ArgLocs[i]; 3737 SmallVector<CCValAssign, 16> ArgLocs; local 3739 getTargetMachine(), ArgLocs, *DAG.getContext()); 3818 for (unsigned i = 0, j = 0, e = ArgLocs.size(); 3821 CCValAssign &VA = ArgLocs[i];
|
/external/llvm/lib/Target/R600/ |
H A D | R600ISelLowering.cpp | 1665 SmallVector<CCValAssign, 16> ArgLocs; local 1667 getTargetMachine(), ArgLocs, *DAG.getContext()); 1678 CCValAssign &VA = ArgLocs[i];
|
H A D | SIISelLowering.cpp | 364 SmallVector<CCValAssign, 16> ArgLocs; local 366 getTargetMachine(), ArgLocs, *DAG.getContext()); 397 CCValAssign &VA = ArgLocs[ArgIdx++]; 438 Reg = ArgLocs[ArgIdx++].getLocReg();
|
/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 1120 SmallVector<CCValAssign, 16> ArgLocs; local 1122 getTargetMachine(), ArgLocs, *DAG.getContext()); 1147 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 1148 CCValAssign &VA = ArgLocs[i]; 1286 SmallVector<CCValAssign, 16> ArgLocs; local 1288 getTargetMachine(), ArgLocs, *DAG.getContext()); 1311 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 1313 CCValAssign &VA = ArgLocs[i];
|
/external/clang/lib/Sema/ |
H A D | SemaTemplateInstantiateDecl.cpp | 2365 SmallVector<TemplateArgumentLoc, 4> ArgLocs; local 2367 ArgLocs.push_back(Loc.getArgLoc(I)); 2368 if (SemaRef.Subst(ArgLocs.data(), ArgLocs.size(),
|
/external/llvm/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 1885 SmallVector<CCValAssign, 16> ArgLocs; local 1886 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, TM, ArgLocs, *Context); 1892 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 1893 CCValAssign &VA = ArgLocs[i]; 1907 !VA.isRegLoc() || !ArgLocs[++i].isRegLoc()) 1942 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 1943 CCValAssign &VA = ArgLocs[i]; 1990 CCValAssign &NextVA = ArgLocs[++i];
|
H A D | ARMISelLowering.cpp | 1419 SmallVector<CCValAssign, 16> ArgLocs; local 1421 getTargetMachine(), ArgLocs, *DAG.getContext(), Call); 1446 for (unsigned i = 0, realArgIdx = 0, e = ArgLocs.size(); 1449 CCValAssign &VA = ArgLocs[i]; 1481 VA, ArgLocs[++i], StackPtr, MemOpChains, Flags); 1483 VA = ArgLocs[++i]; // skip ahead to next loc 1486 VA, ArgLocs[++i], StackPtr, MemOpChains, Flags); 1494 PassF64ArgInRegs(dl, DAG, Chain, Arg, RegsToPass, VA, ArgLocs[++i], 1986 SmallVector<CCValAssign, 16> ArgLocs; local 1988 getTargetMachine(), ArgLocs, *DA 2918 SmallVector<CCValAssign, 16> ArgLocs; local [all...] |
/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 351 SmallVector<CCValAssign, 16> ArgLocs; local 353 getTargetMachine(), ArgLocs, *DAG.getContext()); 359 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i, ++InIdx) { 360 CCValAssign &VA = ArgLocs[i]; 383 CCValAssign &NextVA = ArgLocs[++i]; 551 SmallVector<CCValAssign, 16> ArgLocs; local 553 getTargetMachine(), ArgLocs, *DAG.getContext()); 559 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 560 CCValAssign &VA = ArgLocs[i]; 700 SmallVector<CCValAssign, 16> ArgLocs; local 1006 fixupVariableFloatArgs(SmallVectorImpl<CCValAssign> &ArgLocs, ArrayRef<ISD::OutputArg> Outs) argument [all...] |
/external/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 2827 SmallVector<CCValAssign, 16> ArgLocs; local 2828 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, TM, ArgLocs, 2848 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 2849 CCValAssign &VA = ArgLocs[i];
|
H A D | X86ISelLowering.cpp | 2253 SmallVector<CCValAssign, 16> ArgLocs; local 2255 ArgLocs, *DAG.getContext()); 2265 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 2266 CCValAssign &VA = ArgLocs[i]; 2338 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 2616 SmallVector<CCValAssign, 16> ArgLocs; local 2618 ArgLocs, *DAG.getContext()); 2658 assert(ArgLocs.back().getLocMemOffset() == 0 && 2680 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 2686 CCValAssign &VA = ArgLocs[ 3276 SmallVector<CCValAssign, 16> ArgLocs; local [all...] |
/external/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 2408 SmallVector<CCValAssign, 16> ArgLocs; local 2410 getTargetMachine(), ArgLocs, *DAG.getContext()); 2456 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 2458 CCValAssign &VA = ArgLocs[i]; 2660 SmallVector<CCValAssign, 16> ArgLocs; local 2662 getTargetMachine(), ArgLocs, *DAG.getContext()); 2676 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 2677 CCValAssign &VA = ArgLocs[i]; 2757 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
|
/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 680 SmallVector<CCValAssign, 16> ArgLocs; local 681 CCState CCInfo(CallConv, IsVarArg, MF, DAG.getTarget(), ArgLocs, 687 for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) { 689 CCValAssign &VA = ArgLocs[I]; 786 SmallVectorImpl<CCValAssign> &ArgLocs) { 789 for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) { 790 CCValAssign &VA = ArgLocs[I]; 819 SmallVector<CCValAssign, 16> ArgLocs; local 820 CCState ArgCCInfo(CallConv, IsVarArg, MF, DAG.getTarget(), ArgLocs, 826 if (IsTailCall && !canUseSiblingCall(ArgCCInfo, ArgLocs)) 785 canUseSiblingCall(CCState ArgCCInfo, SmallVectorImpl<CCValAssign> &ArgLocs) argument [all...] |