Searched defs:CalleeCC (Results 1 - 5 of 5) sorted by relevance
| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1667 CallingConv::ID CalleeCC,
1677 bool CCMatch = CallerCC == CalleeCC;
1665 IsEligibleForTailCallOptimization( SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg, bool isCalleeStructRet, bool isCallerStructRet, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG& DAG) const argument
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| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 2172 CallingConv::ID CalleeCC = CS.getCallingConv(); local
2173 if (!IsTailCallConvention(CalleeCC) && !IsCCallConvention(CalleeCC))
3143 CallingConv::ID CalleeCC,
3152 if (!IsTailCallConvention(CalleeCC) && !IsCCallConvention(CalleeCC))
3166 bool CCMatch = CallerCC == CalleeCC;
3167 bool IsCalleeWin64 = Subtarget->isCallingConvWin64(CalleeCC);
3171 if (IsTailCallConvention(CalleeCC) && CCMatch)
3210 CCState CCInfo(CalleeCC, isVarAr
3142 IsEligibleForTailCallOptimization(SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg, bool isCalleeStructRet, bool isCallerStructRet, Type *RetTy, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG) const argument
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 1962 SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg,
1970 if (!IsTailCallConvention(CalleeCC) && CalleeCC != CallingConv::C)
1976 bool CCMatch = CallerCC == CalleeCC;
1988 if (IsTailCallConvention(CalleeCC) && CCMatch)
1999 assert((!isVarArg || CalleeCC == CallingConv::C) &&
2010 CCState CCInfo(CalleeCC, isVarArg, DAG.getMachineFunction(),
2013 CCInfo.AnalyzeCallOperands(Outs, CCAssignFnForCall(CalleeCC, true));
2023 CCState CCInfo1(CalleeCC, false, DAG.getMachineFunction(),
2025 CCInfo1.AnalyzeCallResult(Ins, CCAssignFnForCall(CalleeCC, isVarAr
1961 isEligibleForTailCallOptimization( SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg, bool isCalleeStructRet, bool isCallerStructRet, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG) const argument
[all...] |
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1892 CallingConv::ID CalleeCC,
1902 bool CCMatch = CallerCC == CalleeCC;
1947 ARMCCState CCInfo1(CalleeCC, false, DAG.getMachineFunction(),
1949 CCInfo1.AnalyzeCallResult(Ins, CCAssignFnForNode(CalleeCC, true, isVarArg));
1987 ARMCCState CCInfo(CalleeCC, isVarArg, DAG.getMachineFunction(),
1990 CCAssignFnForNode(CalleeCC, false, isVarArg));
1891 IsEligibleForTailCallOptimization(SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg, bool isCalleeStructRet, bool isCallerStructRet, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG& DAG) const argument
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| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 3093 CallingConv::ID CalleeCC,
3106 if (CalleeCC == CallingConv::Fast && CallerCC == CalleeCC) {
3092 IsEligibleForTailCallOptimization(SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG& DAG) const argument
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