Searched defs:CmpOpc (Results 1 - 5 of 5) sorted by relevance
/external/llvm/lib/Target/Mips/ |
H A D | Mips16ISelLowering.cpp | 706 *Mips16TargetLowering::emitFEXT_T8I816_ins(unsigned BtOpc, unsigned CmpOpc, argument 715 BuildMI(*BB, MI, MI->getDebugLoc(), TII->get(CmpOpc)).addReg(regX) 731 unsigned CmpOpc; local 733 CmpOpc = CmpiOpc; 736 CmpOpc = CmpiXOpc; 739 BuildMI(*BB, MI, MI->getDebugLoc(), TII->get(CmpOpc)).addReg(regX)
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 913 unsigned CmpOpc; local 927 CmpOpc = isNegativeImm ? AArch64::ADDSWri : AArch64::SUBSWri; 929 CmpOpc = AArch64::SUBSWrr; 934 CmpOpc = isNegativeImm ? AArch64::ADDSXri : AArch64::SUBSXri; 936 CmpOpc = AArch64::SUBSXrr; 940 CmpOpc = UseImm ? AArch64::FCMPSri : AArch64::FCMPSrr; 944 CmpOpc = UseImm ? AArch64::FCMPDri : AArch64::FCMPDrr; 973 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(CmpOpc)) 979 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(CmpOpc)) 985 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(CmpOpc)) [all...] |
H A D | AArch64ISelLowering.cpp | 7596 unsigned CmpOpc = Cmp.getOpcode(); local 7597 if (CmpOpc != AArch64ISD::ADDS && CmpOpc != AArch64ISD::SUBS)
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCFastISel.cpp | 763 unsigned CmpOpc; local 768 CmpOpc = PPC::FCMPUS; 771 CmpOpc = PPC::FCMPUD; 780 CmpOpc = IsZExt ? PPC::CMPLW : PPC::CMPW; 782 CmpOpc = IsZExt ? PPC::CMPLWI : PPC::CMPWI; 786 CmpOpc = IsZExt ? PPC::CMPLD : PPC::CMPD; 788 CmpOpc = IsZExt ? PPC::CMPLDI : PPC::CMPDI; 818 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(CmpOpc), DestReg) 821 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(CmpOpc), DestReg)
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/external/llvm/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 1401 unsigned CmpOpc; local 1409 CmpOpc = UseImm ? ARM::VCMPEZS : ARM::VCMPES; 1413 CmpOpc = UseImm ? ARM::VCMPEZD : ARM::VCMPED; 1423 CmpOpc = ARM::t2CMPrr; 1425 CmpOpc = isNegativeImm ? ARM::t2CMNri : ARM::t2CMPri; 1428 CmpOpc = ARM::CMPrr; 1430 CmpOpc = isNegativeImm ? ARM::CMNri : ARM::CMPri; 1454 const MCInstrDesc &II = TII.get(CmpOpc); 1658 unsigned CmpOpc = isThumb2 ? ARM::t2CMPri : ARM::CMPri; local 1659 CondReg = constrainOperandRegClass(TII.get(CmpOpc), CondRe [all...] |
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