Searched defs:CondCode2 (Results 1 - 2 of 2) sorted by relevance
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 881 AArch64CC::CondCode &CondCode2) {
882 CondCode2 = AArch64CC::AL;
906 CondCode2 = AArch64CC::GT;
916 CondCode2 = AArch64CC::VS;
945 AArch64CC::CondCode &CondCode2,
951 changeFPCCToAArch64CC(CC, CondCode, CondCode2);
957 CondCode2 = AArch64CC::GE;
967 changeFPCCToAArch64CC(getSetCCInverse(CC, false), CondCode, CondCode2); local
879 changeFPCCToAArch64CC(ISD::CondCode CC, AArch64CC::CondCode &CondCode, AArch64CC::CondCode &CondCode2) argument
943 changeVectorFPCCToAArch64CC(ISD::CondCode CC, AArch64CC::CondCode &CondCode, AArch64CC::CondCode &CondCode2, bool &Invert) argument
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| /external/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1157 ARMCC::CondCodes &CondCode2) {
1158 CondCode2 = ARMCC::AL;
1169 case ISD::SETONE: CondCode = ARMCC::MI; CondCode2 = ARMCC::GT; break;
1172 case ISD::SETUEQ: CondCode = ARMCC::EQ; CondCode2 = ARMCC::VS; break;
3459 ARMCC::CondCodes CondCode, CondCode2; local
3460 FPCCToARMCC(CC, CondCode, CondCode2);
3497 if (CondCode2 != ARMCC::AL) {
3498 SDValue ARMcc2 = DAG.getConstant(CondCode2, MVT::i32);
3653 ARMCC::CondCodes CondCode, CondCode2; local
3654 FPCCToARMCC(CC, CondCode, CondCode2);
1156 FPCCToARMCC(ISD::CondCode CC, ARMCC::CondCodes &CondCode, ARMCC::CondCodes &CondCode2) argument
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