Searched defs:CondReg (Results 1 - 4 of 4) sorted by relevance
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 789 unsigned CondReg = getRegForValue(TI->getOperand(0)); local
790 if (CondReg == 0)
795 CondReg = FastEmitInst_extractsubreg(MVT::i32, CondReg, /*Kill=*/true,
798 MRI.constrainRegClass(CondReg, &AArch64::GPR32RegClass);
802 .addReg(CondReg)
833 unsigned CondReg = getRegForValue(BI->getCondition()); local
834 if (CondReg == 0)
846 .addReg(CondReg)
1032 unsigned CondReg local
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 702 unsigned CondReg = createResultReg(&PPC::CRRCRegClass); local
705 CondReg))
709 .addImm(PPCPred).addReg(CondReg).addMBB(TBB);
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| /external/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 1632 unsigned CondReg = getRegForValue(I->getOperand(0)); local
1633 if (CondReg == 0) return false;
1659 CondReg = constrainOperandRegClass(TII.get(CmpOpc), CondReg, 0);
1662 .addReg(CondReg)
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| /external/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 1816 // Selects operate on i1, however, CondReg is 8 bits width and may contain
1821 unsigned CondReg = getRegForValue(Cond); local
1822 if (CondReg == 0)
1827 .addReg(CondReg, getKillRegState(CondIsKill)).addImm(1);
1971 unsigned CondReg = getRegForValue(Cond); local
1972 if (CondReg == 0)
1976 .addReg(CondReg, getKillRegState(CondIsKill)).addImm(1);
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